150 lines
4.8 KiB
Makefile
150 lines
4.8 KiB
Makefile
#***************************************************************************************
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# Copyright (c) 2024 Beijing Institute of Open Source Chip (BOSC)
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# Copyright (c) 2020-2024 Institute of Computing Technology, Chinese Academy of Sciences
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# Copyright (c) 2020-2021 Peng Cheng Laboratory
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#
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# DiffTest is licensed under Mulan PSL v2.
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# You can use this software according to the terms and conditions of the Mulan PSL v2.
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# You may obtain a copy of Mulan PSL v2 at:
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# http://license.coscl.org.cn/MulanPSL2
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#
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# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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# EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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# MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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#
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# See the Mulan PSL v2 for more details.
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#***************************************************************************************
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VCS = vcs
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VCS_TOP = tb_top
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VCS_TARGET = $(abspath $(BUILD_DIR)/simv)
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VCS_BUILD_DIR = $(abspath $(BUILD_DIR)/simv-compile)
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VCS_RUN_DIR = $(abspath $(BUILD_DIR)/$(notdir $(RUN_BIN)))
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VCS_CSRC_DIR = $(abspath ./src/test/csrc/vcs)
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VCS_CONFIG_DIR = $(abspath ./config)
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VCS_CXXFILES = $(SIM_CXXFILES) $(shell find $(VCS_CSRC_DIR) -name "*.cpp")
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VCS_CXXFLAGS = $(SIM_CXXFLAGS) -I$(VCS_CSRC_DIR) -DNUM_CORES=$(NUM_CORES)
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VCS_LDFLAGS = $(SIM_LDFLAGS) -lpthread -ldl
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# DiffTest support
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ifneq ($(NO_DIFF),1)
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VCS_FLAGS += +define+DIFFTEST
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endif
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ifeq ($(RELEASE),1)
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VCS_FLAGS += +define+SNPS_FAST_SIM_FFV +define+USE_RF_DEBUG
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endif
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# core soft rst
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ifeq ($(WORKLOAD_SWITCH),1)
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VCS_FLAGS += +define+ENABLE_WORKLOAD_SWITCH
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endif
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ifeq ($(SYNTHESIS), 1)
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VCS_FLAGS += +define+SYNTHESIS +define+TB_NO_DPIC
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else
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ifeq ($(DISABLE_DIFFTEST_RAM_DPIC), 1)
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VCS_FLAGS += +define+DISABLE_DIFFTEST_RAM_DPIC
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endif
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ifeq ($(DISABLE_DIFFTEST_FLASH_DPIC), 1)
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VCS_FLAGS += +define+DISABLE_DIFFTEST_FLASH_DPIC
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endif
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endif
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# if fsdb is considered
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# CONSIDER_FSDB ?= 0
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ifeq ($(CONSIDER_FSDB),1)
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EXTRA = +define+CONSIDER_FSDB
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# if VERDI_HOME is not set automatically after 'module load', please set manually.
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ifndef VERDI_HOME
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$(error VERDI_HOME is not set. Try whereis verdi, abandon /bin/verdi and set VERID_HOME manually)
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else
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NOVAS_HOME = $(VERDI_HOME)
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NOVAS = $(NOVAS_HOME)/share/PLI/VCS/LINUX64
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EXTRA += -P $(NOVAS)/novas.tab $(NOVAS)/pli.a
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endif
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endif
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ifeq ($(VCS),verilator)
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VCS_FLAGS += --exe --cc --main --top-module $(VCS_TOP) -Wno-WIDTH --max-num-width 150000
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VCS_FLAGS += --instr-count-dpi 1 --timing +define+VERILATOR_5
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VCS_FLAGS += -Mdir $(VCS_BUILD_DIR) --compiler gcc
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VCS_CXXFLAGS += -std=c++20
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else
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VCS_FLAGS += -full64 +v2k -timescale=1ns/1ns -sverilog -debug_access+all +lint=TFIPC-L
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VCS_FLAGS += -Mdir=$(VCS_BUILD_DIR) -j200
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VCS_FLAGS += +define+VCS
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ifeq ($(ENABLE_XPROP),1)
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VCS_FLAGS += -xprop
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else
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# randomize all undefined signals (instead of using X)
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VCS_FLAGS += +vcs+initreg+random
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endif
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VCS_CXXFLAGS += -std=c++11 -static
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endif
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VCS_FLAGS += -o $(VCS_TARGET)
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ifneq ($(ENABLE_XPROP),1)
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VCS_FLAGS += +define+RANDOMIZE_GARBAGE_ASSIGN
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VCS_FLAGS += +define+RANDOMIZE_INVALID_ASSIGN
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VCS_FLAGS += +define+RANDOMIZE_MEM_INIT
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VCS_FLAGS += +define+RANDOMIZE_REG_INIT
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endif
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# manually set RANDOMIZE_DELAY to avoid VCS from incorrect random initialize
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# NOTE: RANDOMIZE_DELAY must NOT be rounded to 0
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VCS_FLAGS += +define+RANDOMIZE_DELAY=1
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# SRAM lib defines
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VCS_FLAGS += +define+UNIT_DELAY +define+no_warning
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# C++ flags
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VCS_FLAGS += -CFLAGS "$(VCS_CXXFLAGS)" -LDFLAGS "$(VCS_LDFLAGS)"
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# search build for other missing verilog files
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VCS_FLAGS += -y $(RTL_DIR) +libext+.v +libext+.sv
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# search generated-src for verilog included files
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VCS_FLAGS += +incdir+$(GEN_VSRC_DIR)
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# enable fsdb dump
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VCS_FLAGS += $(EXTRA)
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VCS_VSRC_DIR = $(abspath ./src/test/vsrc/vcs)
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VCS_VFILES = $(SIM_VSRC) $(shell find $(VCS_VSRC_DIR) -name "*.v")
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$(VCS_TARGET): $(SIM_TOP_V) $(VCS_CXXFILES) $(VCS_VFILES)
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$(VCS) $(VCS_FLAGS) $(SIM_TOP_V) $(VCS_CXXFILES) $(VCS_VFILES)
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ifeq ($(VCS),verilator)
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$(MAKE) -s -C $(VCS_BUILD_DIR) -f V$(VCS_TOP).mk
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endif
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simv: $(VCS_TARGET)
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RUN_OPTS := +workload=$(RUN_BIN)
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ifeq ($(TRACE),1)
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ifeq ($(CONSIDER_FSDB),1)
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RUN_OPTS += +dump-wave=fsdb
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else
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RUN_OPTS += +dump-wave=vpd
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endif
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endif
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ifneq ($(REF_SO),)
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RUN_OPTS += +diff=$(REF_SO)
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endif
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ifeq ($(NO_DIFF),1)
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RUN_OPTS += +no-diff
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endif
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RUN_OPTS += -assert finish_maxfail=30 -assert global_finish_maxfail=10000
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simv-run:
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$(shell if [ ! -e $(VCS_RUN_DIR) ]; then mkdir -p $(VCS_RUN_DIR); fi)
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touch $(VCS_RUN_DIR)/sim.log
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$(shell if [ -e $(VCS_RUN_DIR)/simv ]; then rm -f $(VCS_RUN_DIR)/simv; fi)
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$(shell if [ -e $(VCS_RUN_DIR)/simv.daidir ]; then rm -rf $(VCS_RUN_DIR)/simv.daidir; fi)
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ln -s $(VCS_TARGET) $(VCS_RUN_DIR)/simv
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ln -s $(BUILD_DIR)/simv.daidir $(VCS_RUN_DIR)/simv.daidir
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cd $(VCS_RUN_DIR) && (./simv $(RUN_OPTS) 2> assert.log | tee sim.log)
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vcs-clean:
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rm -rf simv csrc DVEfiles simv.daidir stack.info.* ucli.key $(VCS_BUILD_DIR)
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