verilator.mk checks the existence of ccache and use it when possible.
However, on some OS platforms, such as CentOS, this checker may cause
warning messages if ccache does not exist. Since this checker is always
called even when the user is not building Verilator targets, the warning
message seems confused for users.
We avoid this message by redirecting the stderr to /dev/null.
This commit changes the default target of make to difftest_verilog.
The previous default target is emu. However, emu is for only the Verilator
target, one of the three supported simulation platforms.
To make the default target clearer, we change the default target to
difftest_verilog. It generates example difftest design-under-test
interfaces and C++ files. Using this main target, user may connect
their own design (maybe in Verilog) to difftest for simulation.
Verilator v5.026 comes with an automated stack resizer for various
verilated models. The stack size will be set implicitly in the
constructor of the verilated design based on an estimated stack size
requirement.
Thus, we comment out the `setrlimit` lines for newer version of
Verilator. They will use the estimated stack size instead of the
predetermined constant value.
For non-chisel design target `difftest_verilog`, the `NOOP_HOME` was set to
`$(abspath .)` as default by Makefile. But it was not exported.
This will cause `NOOP_HOME not found exception` when running `streamToFile()`
in difftest.test.runMain task.
Fix this by exporting NOOP_HOME in Makefile.
Signed-off-by: Jiuyue Ma <majiuyue@bosc.ac.cn>
The `<fcntl.h>` header file was not included if difftest was compiled
without zstd support (a.k.a w/ `NO_ZSTD_COMPRESSION` defined), which
will cause `undefined symbol` compile errors for `open()` and `O_RDONLY`.
Move `fcntl.h` out of NO_ZSTD_COMPRESSION to make compiler happy.
This BUG was introduced by following commit:
```
compress: using magic number to determine the file type (#352)
- commit: 57aa88a696
- Date: Wed Apr 24 16:29:53 2024 +0800
```
Signed-off-by: Jiuyue Ma <majiuyue@bosc.ac.cn>
Add Version Checker and Install note into Makefile. So user should
ensure correct clang-format version for difftest.
* Add more 2> /dev/null to avoid unused warnings
---------
Co-authored-by: Yinan Xu <xuyinan@ict.ac.cn>
When exiting the program using max_instrs, ensure that each core
runs to the corresponding number of instructions, and add the core
id when printing the IPC.
In difftest, CSR is only valid and used when instrcommit or
exception. The value is invalid in other time, so we will only
squash HCSR/VecCSR when there is commit/event.
* This commit adds support for using difftest as a lib to simulate with XS.
* For now, it works both on VCS and Palladium.
* use "make difftest-so" to generate libdifftest.so and link it when compiling your design.
---------
Co-authored-by: Cai Luoshan <cailuoshan18@mails.ucas.ac.cn>
When the simulation exits abnormally, we should let the user know
there're failures.
* Add the flag for completion of workload lists
We add a flag to indicate the completion of workload lists and let
the simulation exit normally at the end of the list.
Since this flag will be read only when simv_init fails, we expect
minor impact on the simulation performance.
Verilator v5.024 introduces stats reports for both verilation and
simulation. These reports are never expected to be useful for normal
users but brings annoying prints. We are disabling them by default.
For advanced users, they should remove the `--quiet-stats` option
manually in the Makefile.
We use Queue to buffer StoreEvent, avoid too many squash tick
caused by it. This bundle will only compare store actions betweens
DUT and REF, no other bundles depends on it, which enable us to buffer
it.
Another bundle causing many ticks is Sbuffer, for it will update
GoldenMem, and other bundle related will affected by it. Now buffering
of this bundle need Squash Flush Option, which means drop outdated
bundles depending on GoldenMem.
Previous we give each bundle a different delay to collect valid value by
Pipeline.
This change process bundles of same class in parallel, because offset
is easy to count, and it will reduce stages in pipeline to reduces regs.
We also sort bundles by width, giving larger bundle less delay for less
reg. And add `num` to info, which will reduce info costs with multiple
bundle of same class.
This commit enhances difftest to include support for hypervisor extension,
including newly added CSR, extra checking logic for two-stage address
translation, and handlers of newly added exceptions.
We seperate DiffTestBundles into REF/GoldenMem, tick of Bundle will
only affected by it's Group. Default Group is REF. Note some bundle
will have several Group, because it will affect both REF and GoldenMem
state. Bundles allowed to be dropped will ticked incidentially when
it's Group tick.
We also add built-in perf to count the tick cause of each Group.
We sperate squash of bundles with same CppName, which support we change
bundle num when squashing, preliminary support for later feature.Note
bundle num of replay and squash may be different.
We seperate Replay feature for better structure. Signal `in_replay` will mark trace as replay or not, replayed trace will not be squashed. And we will record squashed range between `trace_head` and `trace_tail`, see detailed in squash function of `DiffTraceInfo`. In the future, Replay may support not only Squashed, but also Compress, etc.
This change also provides better flexibility for optimization. Now difftest will generated Cpp declaration depends on result of Gateway.
We will dump built-in Perf for difftest at the end of simulation. These printfs can be controled by difftest_perfCtrl_dump.
For emu, we call Emulator::trigger_stat_dump. For simv, we raise difftest_perfCtrl_dump when simv_result is not zero.
We also add system task decl $fwrite to Palladium scripts, otherwise it will be ignored by compiler.
Previous change #312 has an extra space, which cause error in path parsing, this change fixs it.
The usage of subst is $(subst <from>,<to>,<text>), redundant space is not allowed.
MemRWHelper imports the same DPI-C functions as MemRHelper and
MemWHelper. When they are instantiated at the same time, they will
bring duplicated DPI-C function imports in different design files.
The conflict DPI-C names will abort the RTL simulator.
We replace MemRHelper and MemWHelper with MemRWHelper. Read-only
or write-only memories should tie write/read off with zeros.
Previously the instruction commit checker loops over the commit slots
and breaks the loop at any invalid slot. This avoids checking further
slots and may have better performance.
However, if the design-under-test does not commit instructions one by
one, the checker may fail to locate the valid instructions.
This commit fixes it by checking every commit slot.
Previou for Verilator/VCS, SIM_CXXFLAGS will be passed twice, so
we use \\\" for path, make it visible as " inside the code.
For Palladium, we pass these CXX_FLAGS directly to gcc, so we should
replace \\\" with \", to make it treat correctly in compilation.
This commit brings a DataMirror in the difftest.util package. It
now includes a method called isVisible which returns the visibility
of a Data object, which was originally brought into Chisel 6.1.0 for
the first time.
Since this method does not exist in older versions of Chisel, and
DiffTest must be compatible with legacy versions of Chisel, we use
Scala reflection features to load this method dynamically. If not
found, this method always returns false.
The default running status val is -1 for emu, 0 for simv. difftest_nstep perform n step comparison for emu, it should return STATE_RUNNING instead of 0 by defualt.
We fix the problem caused by PR#308(https://github.com/OpenXiangShan/difftest/pull/308)
In batch mode, dut may point to serveral posible position of diffstate_buffer. Trap check in difftest_state also relies on correct
dut position. So we should set dut before difftest_state.
Previosly we set dut only when difftest_step, however even without diff, we should also set correct dut. So we seperate the logic into difftest_set_dut, and difftest_step will call it.
This problem is hidden before, because trap may be check by next step of same batch can occasionally. But it fail when trap in right at last step of batch.
Also for emu, we apply zoneSwitch and setDut when no enable_diff.
Previously we use synthesizable flash only when SYNTHESIS=1, now we support configuring synthesizable flash just like memory, so we can use it to run workload based on flash.
Yinan Xu
Jiuyue Ma