To support difftest for projects that use their own palladium flow,
the build of DPILIB_EMU shared library should be moved to separated
target.
Signed-off-by: Liu Shan <liushan@bosc.ac.cn>
Signed-off-by: Jiuyue Ma <majiuyue@bosc.ac.cn>
Co-authored-by: Liu Shan <liushan@bosc.ac.cn>
Previous change #312 has an extra space, which cause error in path parsing, this change fixs it.
The usage of subst is $(subst <from>,<to>,<text>), redundant space is not allowed.
Previou for Verilator/VCS, SIM_CXXFLAGS will be passed twice, so
we use \\\" for path, make it visible as " inside the code.
For Palladium, we pass these CXX_FLAGS directly to gcc, so we should
replace \\\" with \", to make it treat correctly in compilation.
Previously we use synthesizable flash only when SYNTHESIS=1, now we support configuring synthesizable flash just like memory, so we can use it to run workload based on flash.
We add SYNTHESIS macros around generated DPIC funcs, and TB_NO_DPIC macros around DPIC funcs in fixed vsrc of TB.
With this change, difftest with non-default GatewayConfig can run in both SYNTHESIS or not.
Support --workload-list option for vcs simulation framework. By add running args like `--workload-list=<listfile_name>`，user can run several workload in a single launch on VCS or Palladium. This feature will greatly reduce time required to run many short workloads. Each line of list file should `workload-name max-instr-limit`.
To support this feature, we add workload-switch logic. When a workload is done (or exceed max-instr-limit)，we will raise workload-switch signal according to simv_result. Then the reset signal will be set to high. Other logic will only rely on reset logic, so we can see each workload independently.
Note: Now DUT memory has two implementation schemes: load memory to Hardware memory when initial, or load memory in software, then read/write by DPIC. Currently the first scheme cannot support reload memory when reset again. So we must ensure using DPIC memory.
The whole progress of handling workload-list is like follows:
1. When initial, user pass workload-list.
2. When `reset` is set to high. User will trigger simv_init, it will get workload and max-instr from workload-list, just like only a workload is run. Software and DUT memory(DPIC) will be inited in this.
3. When `simv_nstep` is ended successfully. `workload-switch` will set `reset` to high. Software should be free by difftest_finish. Then Back to Point 2.
4. When `simv_init` gets no more workload from list. The whole simulation is ended.
Now we release related palladium scripts and user should set PLDM_HOST
for internal information.
We use wildcard for boards occupation in compilerOptions.qel, it can
automatically choose approprate boards count. User can also set it
manully like {boards 0+1.1+1.2}, which means occupy 1 board and 2 extra
domains. It can be estimated by gate count in xe.msg.
We add Macros to turn off DPIC on MemRWHelper and SimJTAG without
SYNTHESIS. That means we can reduce number of synchronizations if
needed. The new Macros is defined in palladium.mk by default.
To add build-in decleration of system task for Palladium, we need
to add $.
We declare fwrite in tb_top as Gfifo to reduce synchronizations and
speed up simulation.
Currently all macros in Gateway can be decided by GatewayConfig,
we move macros inside Config for better comprehension.
Difftest-related macros in Verilog can be configured in generated
DifftestMacros.v, which should be included by all files use those macros.
Some redundant passing of config and return val of collect is removed.
Some macros are renamed for similar format.
Makefile and mk are changed to include generated/DifftestMacros.v
We remove RANDOMIZE_GARBAGE_ASSIGN and RANDOMIZE_INVALID_ASSIGN
because it will cause many DPIC function to get $random, which slow
the simulation speed.
Move some display and delay declaration inside module, because some
module may sometimes not be used by DUT, declaration in command-line
will cause conflict.
PLDM_CXXFLAGS: add missing + to avoid param overriden
XMSIM_FLAGS: add -PROFTHREAD to support profile for multithread
Ident spaces: modify ident to align
Add non-block DPIC macros to Makefile, enabled by default.
Rename Async to Deferred, because when using only non-block DPIC,
we still need to synchronize at regular intervals. Hardware need to
pause until comparision is done.
It only means synchronization interal is extended, and result may be
deferred. But not turely async. We will try to add related implementation
later. So Hardware no need to wait for Comparison done.
Now we add macros to command line and each vfiles. We will try to gen it
at seperate macros.v later to make it configurable.
* Makefile,Scripts: support Palladium simulation
To add extra Macros when pldm-build, use PLDM_EXTRA_MACRO="..."
To add extra Args when make pldm-run/pldm-debug, use PLDM_EXTRA_ARGS="..."
Use RELEASE_WITH_ASSERT to specify Palladium simulation without Software.
We will provide default path of PLDM_SCRIPTS_DIR in internal env.sh.
User can copy dir and specify path for its own arguments.
Jiuyue Ma