6 Commits

Author	SHA1	Message	Date
Xianyi Zhang	fc35b72ae1	Refs #2899 ... Merge branch 'openblas-open-910' of git://github.com/damonyu1989/OpenBLAS into damonyu1989-openblas-open-910	2020-11-10 09:38:04 +08:00
damonyu	ef8e7d0279	Add the support for RISC-V Vector. ... Change-Id: Iae7800a32f5af3903c330882cdf6f292d885f266	2020-10-15 16:09:02 +08:00
Xianyi Zhang	265ab484c8	Change default RISC-V 64-bit corename to RISCV64_GENERIC ... e.g. make CC=riscv64-unknown-linux-gnu-gcc FC=riscv64-unknown-linux-gnu-gfortran TARGET=RISCV64_GENERIC HOSTCC=gcc	2020-02-27 14:46:15 +08:00
Xianyi Zhang	44020a42a4	Fixed compile bug for RV64.	2020-02-27 14:29:42 +08:00
Jerry Zhao	0ee395db35	Fixed TRMM and SYMM for RISCV	2018-04-18 18:03:32 -07:00
Jerry Zhao	c167a3d6f4	Added RISCV build	2018-04-16 14:08:31 -07:00