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Author SHA1 Message Date
Martin Kroeker dc3aa2cbd9
Fix non-SVE ARM64 potentially using non-zeroed register in SDOT/DDOT accumulation (#5918) 
* Zero d0 register as it may not be identical with OUT, amend clobber list

* Add sdot/ddot reproducer from issue 5917 as ARM64-specific utest
 2026-07-15 17:30:11 +02:00
moluopro 06d553d0b1 arm64: normalize SME direct source line endings 2026-07-09 13:44:29 +08:00
moluopro 6fdc8db640 arm64: tighten SME STRMM direct variants 2026-07-09 13:43:51 +08:00
moluopro 95cae64181 arm64: harden SME SGEMM direct heuristic 2026-07-09 13:42:48 +08:00
Martin Kroeker de54968e16
Merge pull request #5890 from martin-frbg/fixup5843 
Apply the NEON S/DOMATCOPY kernels from PR 5843 to all arm64 targets
 2026-07-07 00:47:11 +02:00
Martin Kroeker a5d477f195
fix omatcopy filenames 2026-07-06 12:28:02 +02:00
Martin Kroeker 36365a602e
Make the OMATCOPY kernels from 5843 universally available 2026-07-06 11:49:27 +02:00
moluopro 130102e661 Clean up SSYR2K SME direct warnings 
Mark read-only transpose inputs const and limit sve_cntw and ldb definitions to the variants that use them.
 2026-07-06 16:00:21 +08:00
moluopro 3781e2c15d Clean up SSYRK SME direct warnings 
Mark the read-only B input const and limit sve_cntw and ldb definitions to the variants that use them.
 2026-07-06 15:59:53 +08:00
moluopro edd8ab196d Clean up SSYMM SME preprocessing warnings 
Use const source pointers in the symmetric preprocessing helpers and compile only the LU or LL helper needed by each object variant.
 2026-07-06 15:59:25 +08:00
moluopro 8cde36c9b8 Use integer round-up in ARM64 SME direct kernels 
The padded SME dimensions are integer quantities, so compute them with integer arithmetic and drop the now-unused math.h include.
 2026-07-06 15:33:29 +08:00
moluopro d49cd021dd Handle zero alpha/beta in SSYR2K SME direct kernel 
Avoid loading C when beta is zero, and skip A/B preprocessing for alpha == 0 or K == 0 by reusing the triangular direct kernel with k = 0.
 2026-07-06 15:30:42 +08:00
moluopro 9925b29db5 Handle zero alpha/beta in SSYRK SME direct kernel 
Avoid loading C when beta is zero, and skip A preprocessing for alpha == 0 or K == 0 by reusing the triangular direct kernel with k = 0.
 2026-07-06 15:30:37 +08:00
moluopro 35a841fd49 Handle zero alpha in SSYMM SME direct kernel 
When alpha is zero, avoid preprocessing the symmetric matrix and reuse the SGEMM alpha/beta direct kernel with k = 0 for the beta-only update.
 2026-07-06 15:30:27 +08:00
moluopro ab27636deb Handle zero alpha/beta in SGEMM SME direct kernel 
Avoid loading C when beta is zero; ZA has already been initialized to zero.

For alpha == 0 or K == 0, skip A preprocessing and reuse the direct kernel with k = 0 to perform only the beta update.
 2026-07-06 15:30:22 +08:00
Julien Schueller 43f0a90e1b Fix ZA tile slice indices in ssyrk SME direct kernel 
The kernel_2x2 function uses 4 ZA tiles (0-3) each with svl slices.
Tiles 0/1 handle rows 0..svl-1 with slice indices 0..svl-1.
Tiles 2/3 handle rows svl..2*svl-1, so their slice indices
must start at 0, i.e. (i - svl) instead of i.

Fix all three tile 2/3 access sites:
- C load into ZA (svwrite_hor_za32_f32_m)
- C writeback for UPPER (svst1_hor_za32)
- C writeback for LOWER (svst1_hor_za32)

Fixes #5873
 2026-07-02 09:29:32 +02:00
zhir 46aa158dcc AArch64: NEON omatcopy CT/RT kernels 2026-06-20 22:54:04 +03:00
Martin Kroeker 0f9f6e4be5
Merge pull request #5710 from martin-frbg/issue5708 
Work around miscompilation of the ARM64 non-SVE DDOT kernel
 2026-03-27 22:09:08 +01:00
yuanjia e6eba9fa21 Add optimized FP16 shgemm for for NEOVERSEN2 target 2026-03-27 17:55:06 +08:00
Martin Kroeker e3ce4623c2
Use volatile attribute for SDOT only, to avoid creating new miscompilations 2026-03-24 23:08:02 +01:00
Martin Kroeker 3f6e928d34
Declare result as volatile to keep compilers from optimizing it out 2026-03-20 11:32:23 +01:00
Fadi Arafeh f30202b705 Accelerate SVE128 SBGEMM/BGEMM 
This accelerates SBGEMM/BGEMM by extending the existing 8x4 kernel to 8x8 (unrolling N by 8)

Not sure if it's a good idea to delete the previous 8x4 kernel?

Here are the speedups on single core Neoverse-V2 (SVE128) compared to prev state:

Per-shape speedup
  M=N=K=64: SBGEMM 1.164x (16.42%), BGEMM 1.133x (13.30%)
  M=N=K=128: SBGEMM 1.220x (22.02%), BGEMM 1.186x (18.56%)
  M=N=K=256: SBGEMM 1.241x (24.08%), BGEMM 1.235x (23.54%)
  M=N=K=512: SBGEMM 1.240x (23.95%), BGEMM 1.227x (22.75%)
  M=N=K=1024: SBGEMM 1.251x (25.11%), BGEMM 1.232x (23.23%)
  M=N=K=2048: SBGEMM 1.235x (23.47%), BGEMM 1.246x (24.64%)

Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
 2026-03-05 13:50:07 +00:00
Martin Kroeker 69d92490c1
move inclusion of sme_abi header into the conditional section 2026-01-29 22:24:00 +01:00
Martin Kroeker 861b3db733
Reuse ?SUM kernels from ThunderX2T99 2026-01-20 15:42:09 +01:00
Martin Kroeker 71261a7b3f
Trivially derive optimized S/DSUM for existing SASUM/DASUM kernels 2026-01-20 15:38:50 +01:00
Jameson Nash a18a4ee08a arm64: fix clang ICE on Windows for zdot_thunderx2t99.c 
Guard .align directive to avoid internal compiler error on
AArch64 Windows with clang.

See: https://github.com/llvm/llvm-project/issues/149547
See: #5076

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
 2026-01-19 15:36:14 +00:00
Martin Kroeker 6de062cfc2
Merge branch 'OpenMathLib:develop' into issue5414 2026-01-11 17:45:11 +01:00
Martin Kroeker d1de282a4e
Improve the precision of S/CNRM2 by summing in double precision 2026-01-11 13:04:00 +01:00
Martin Kroeker a9a6edaf17
Adapt for DYNAMIC_ARCH with multiple ...preprocess symbols 2026-01-09 15:29:36 +01:00
Martin Kroeker 2d46f1ec65
Merge branch 'develop' into issue5414 2026-01-09 15:04:06 +01:00
Martin Kroeker c040d5ed86
Merge pull request #5591 from quic/topic/ssyr2k_direct_sme1 
Support for SME1 based ssyr2k_direct kernel for cblas_ssyr2k level 3 API
 2026-01-08 15:47:38 +01:00
Zhiqing xie 6939a43c3b Support for SME1 based ssyr2k_direct kernel for cblas_ssyr2k level 3 API 2026-01-08 11:09:04 +08:00
Martin Kroeker d39b77748f
Make .align conditional on not being on WoA and strip CRLF endings 2025-12-24 20:00:45 +01:00
Martin Kroeker ac2c66321d
remove special handling of C/ZDOT for LLVM on WoA 2025-12-19 17:04:21 +01:00
Martin Kroeker cfa28bcf71
Support compilation with LLVM for Windows on Arm 2025-12-19 17:00:47 +01:00
Martin Kroeker e85efb8d86
remove za from clobber lists 2025-12-03 22:40:02 +01:00
Martin Kroeker a683287006
rework for dynamic_arch 2025-11-24 22:24:06 +01:00
Martin Kroeker b185c9a4ce
small fixes for separating sme and dummy parts 2025-11-24 22:22:14 +01:00
Martin Kroeker 8c0b13c41c
Merge branch 'OpenMathLib:develop' into issue5414 2025-11-23 23:12:49 +01:00
Martin Kroeker ea85b6696f
Merge branch 'OpenMathLib:develop' into issue5414 2025-11-23 10:14:07 +01:00
Abhishek Kumar a14caf464f add tt for a64fx dot 
Signed-off-by: Abhishek Kumar <abhishek.r.kumar@fujitsu.com>
 2025-11-20 12:14:17 +05:30
Martin Kroeker 17f2e94260
Merge pull request #5539 from FRosner/arm64-dot-kernel-refactoring 
Refactoring: ARM64 dot Kernel: don't call num_cpu_avail twice
 2025-11-18 23:25:51 +01:00
Frank Rosner 762ed66c72
Refactoring: ARM64 dot Kernel: don't call num_cpu_avail twice 2025-11-18 15:34:51 +01:00
mayeut 39d5e44723
fix: dot_kernel_sve "n" usage & clobber list 2025-11-17 21:53:51 +01:00
Martin Kroeker f2d010de12
Merge pull request #5512 from quic/topic/ssyrk_direct_sme1 
Support for SME1 based ssyrk_direct kernel for cblas_ssyrk level 3 API
 2025-11-06 14:06:43 -08:00
Martin Kroeker 585e6d0680
Merge pull request #5515 from iha-taisei/feature/ger_unroll 
Improve single-thread performance of [SD]GER on A64FX and Neoverse V1
 2025-10-24 08:17:06 -07:00
Iha, Taisei cb66aca707 Improve single-thread performance of [SD]GER on A64FX and Neoverse V1 2025-10-22 19:56:14 +09:00
Yichao Yu 3d19d3b60a Make dummy function have the same linkage as the real one 2025-10-20 12:42:39 -04:00
changjua 43d38d336f Support for SME1 based ssyrk_direct kernel for cblas_ssyrk level 3 API 2025-10-20 11:35:20 +08:00
Martin Kroeker 9bfc3612f9
Merge branch 'OpenMathLib:develop' into issue5414 2025-10-12 09:18:06 -07:00