2025-07-24 19:30:43 +08:00
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###############################################################################
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# Copyright (c) 2025, The OpenBLAS Project
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# All rights reserved.
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met:
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in
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# the documentation and/or other materials provided with the
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# distribution.
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# 3. Neither the name of the OpenBLAS project nor the names of
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# its contributors may be used to endorse or promote products
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# derived from this software without specific prior written permission.
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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# ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
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# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# POSSIBILITY OF SUCH DAMAGE.
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###############################################################################
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2021-01-12 23:34:18 +08:00
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ifneq ($(C_COMPILER), PGI)
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2021-07-23 19:42:52 +08:00
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2021-10-18 06:26:14 +08:00
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ifeq ($(C_COMPILER), CLANG)
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ISCLANG=1
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endif
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2022-07-26 01:48:59 +08:00
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ifeq ($(C_COMPILER), FUJITSU)
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ISCLANG=1
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endif
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2021-10-18 06:26:14 +08:00
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ifneq (1, $(filter 1,$(GCCVERSIONGT4) $(ISCLANG)))
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2021-07-23 19:42:52 +08:00
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CCOMMON_OPT += -march=armv8-a
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ifneq ($(F_COMPILER), NAG)
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FCOMMON_OPT += -march=armv8-a
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endif
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else
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2013-11-24 22:47:00 +08:00
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ifeq ($(CORE), ARMV8)
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CCOMMON_OPT += -march=armv8-a
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2021-03-14 03:16:18 +08:00
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ifneq ($(F_COMPILER), NAG)
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2013-11-24 22:47:00 +08:00
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FCOMMON_OPT += -march=armv8-a
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endif
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2021-03-14 03:16:18 +08:00
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endif
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2013-11-24 22:47:00 +08:00
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2021-11-02 05:53:21 +08:00
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ifeq ($(CORE), ARMV8SVE)
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CCOMMON_OPT += -march=armv8-a+sve
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ifneq ($(F_COMPILER), NAG)
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FCOMMON_OPT += -march=armv8-a+sve
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endif
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endif
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2024-12-05 14:11:05 +08:00
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ifeq ($(CORE), ARMV9SME)
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CCOMMON_OPT += -march=armv9-a+sve2+sme
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FCOMMON_OPT += -march=armv9-a+sve2
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endif
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Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
2018-11-16 23:45:12 +08:00
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ifeq ($(CORE), CORTEXA53)
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CCOMMON_OPT += -march=armv8-a -mtune=cortex-a53
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2021-03-14 03:16:18 +08:00
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ifneq ($(F_COMPILER), NAG)
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Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
2018-11-16 23:45:12 +08:00
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FCOMMON_OPT += -march=armv8-a -mtune=cortex-a53
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endif
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2021-03-14 03:16:18 +08:00
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endif
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Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
2018-11-16 23:45:12 +08:00
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2015-09-04 15:56:52 +08:00
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ifeq ($(CORE), CORTEXA57)
|
Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
2018-11-16 23:45:12 +08:00
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CCOMMON_OPT += -march=armv8-a -mtune=cortex-a57
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2021-03-14 03:16:18 +08:00
|
|
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ifneq ($(F_COMPILER), NAG)
|
Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
2018-11-16 23:45:12 +08:00
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FCOMMON_OPT += -march=armv8-a -mtune=cortex-a57
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endif
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2021-03-14 03:16:18 +08:00
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|
endif
|
Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
2018-11-16 23:45:12 +08:00
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ifeq ($(CORE), CORTEXA72)
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CCOMMON_OPT += -march=armv8-a -mtune=cortex-a72
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2021-03-14 03:16:18 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
2018-11-16 23:45:12 +08:00
|
|
|
FCOMMON_OPT += -march=armv8-a -mtune=cortex-a72
|
2015-09-04 15:56:52 +08:00
|
|
|
endif
|
2021-03-14 03:16:18 +08:00
|
|
|
endif
|
2013-11-24 22:47:00 +08:00
|
|
|
|
Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
2018-11-16 23:45:12 +08:00
|
|
|
ifeq ($(CORE), CORTEXA73)
|
|
|
|
|
CCOMMON_OPT += -march=armv8-a -mtune=cortex-a73
|
2021-03-14 03:16:18 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
2018-11-16 23:45:12 +08:00
|
|
|
FCOMMON_OPT += -march=armv8-a -mtune=cortex-a73
|
2016-10-04 16:50:20 +08:00
|
|
|
endif
|
2021-03-14 03:16:18 +08:00
|
|
|
endif
|
2016-10-04 16:50:20 +08:00
|
|
|
|
2024-04-03 01:44:17 +08:00
|
|
|
ifeq ($(CORE), CORTEXA76)
|
|
|
|
|
CCOMMON_OPT += -march=armv8.2-a -mtune=cortex-a76
|
|
|
|
|
ifneq ($(F_COMPILER), NAG)
|
|
|
|
|
FCOMMON_OPT += -march=armv8.2-a -mtune=cortex-a76
|
|
|
|
|
endif
|
|
|
|
|
endif
|
|
|
|
|
|
2022-03-27 21:24:40 +08:00
|
|
|
ifeq ($(CORE), FT2000)
|
|
|
|
|
CCOMMON_OPT += -march=armv8-a -mtune=cortex-a72
|
|
|
|
|
ifneq ($(F_COMPILER), NAG)
|
|
|
|
|
FCOMMON_OPT += -march=armv8-a -mtune=cortex-a72
|
|
|
|
|
endif
|
|
|
|
|
endif
|
|
|
|
|
|
2020-02-22 06:46:58 +08:00
|
|
|
# Use a72 tunings because Neoverse-N1 is only available
|
|
|
|
|
# in GCC>=9
|
|
|
|
|
ifeq ($(CORE), NEOVERSEN1)
|
2021-10-18 06:26:14 +08:00
|
|
|
ifeq (1, $(filter 1,$(GCCVERSIONGTEQ7) $(ISCLANG)))
|
2023-07-13 14:38:03 +08:00
|
|
|
ifeq (1, $(filter 1,$(GCCVERSIONGTEQ9) $(ISCLANG)))
|
2022-12-07 05:23:07 +08:00
|
|
|
CCOMMON_OPT += -march=armv8.2-a -mtune=neoverse-n1
|
2021-03-14 03:16:18 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
2020-02-22 06:46:58 +08:00
|
|
|
FCOMMON_OPT += -march=armv8.2-a -mtune=neoverse-n1
|
2021-03-14 03:16:18 +08:00
|
|
|
endif
|
2020-02-22 06:46:58 +08:00
|
|
|
else
|
2022-12-07 05:23:07 +08:00
|
|
|
CCOMMON_OPT += -march=armv8.2-a -mtune=cortex-a72
|
2021-03-14 03:16:18 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
2020-02-22 06:46:58 +08:00
|
|
|
FCOMMON_OPT += -march=armv8.2-a -mtune=cortex-a72
|
|
|
|
|
endif
|
2021-03-14 03:16:18 +08:00
|
|
|
endif
|
2020-02-22 06:46:58 +08:00
|
|
|
else
|
|
|
|
|
CCOMMON_OPT += -march=armv8-a -mtune=cortex-a72
|
2021-03-14 03:16:18 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
2020-02-22 06:46:58 +08:00
|
|
|
FCOMMON_OPT += -march=armv8-a -mtune=cortex-a72
|
|
|
|
|
endif
|
|
|
|
|
endif
|
2021-03-14 03:16:18 +08:00
|
|
|
endif
|
2020-02-22 06:46:58 +08:00
|
|
|
|
2022-01-07 08:28:17 +08:00
|
|
|
# Use a72 tunings because Neoverse-V1 is only available
|
2022-11-09 17:46:43 +08:00
|
|
|
# in GCC>=10.4
|
2022-01-07 08:28:17 +08:00
|
|
|
ifeq ($(CORE), NEOVERSEV1)
|
|
|
|
|
ifeq (1, $(filter 1,$(GCCVERSIONGTEQ7) $(ISCLANG)))
|
2023-07-13 14:38:03 +08:00
|
|
|
ifeq (1, $(filter 1,$(GCCVERSIONGTEQ10) $(ISCLANG)))
|
|
|
|
|
ifeq (1, $(filter 1,$(GCCMINORVERSIONGTEQ4) $(GCCVERSIONGTEQ11) $(ISCLANG)))
|
2024-12-03 01:03:10 +08:00
|
|
|
CCOMMON_OPT += -march=armv8.4-a+sve+bf16
|
2023-07-13 14:38:03 +08:00
|
|
|
ifeq (1, $(ISCLANG))
|
|
|
|
|
CCOMMON_OPT += -mtune=cortex-x1
|
|
|
|
|
else
|
|
|
|
|
CCOMMON_OPT += -mtune=neoverse-v1
|
|
|
|
|
endif
|
2022-01-07 08:28:17 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
|
|
|
|
FCOMMON_OPT += -march=armv8.4-a -mtune=neoverse-v1
|
|
|
|
|
endif
|
|
|
|
|
else
|
2024-12-03 01:03:10 +08:00
|
|
|
CCOMMON_OPT += -march=armv8.4-a+sve+bf16
|
2024-01-16 05:40:21 +08:00
|
|
|
ifneq ($(CROSS), 1)
|
|
|
|
|
CCOMMON_OPT += -mtune=native
|
|
|
|
|
endif
|
2022-01-07 08:28:17 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
2024-01-16 05:40:21 +08:00
|
|
|
FCOMMON_OPT += -march=armv8.4-a
|
|
|
|
|
ifneq ($(CROSS), 1)
|
|
|
|
|
FCOMMON_OPT += -mtune=native
|
|
|
|
|
endif
|
2022-01-07 08:28:17 +08:00
|
|
|
endif
|
|
|
|
|
endif
|
|
|
|
|
else
|
2024-01-26 23:30:52 +08:00
|
|
|
CCOMMON_OPT += -march=armv8.2-a+sve -mtune=cortex-a72
|
2022-01-07 08:28:17 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
|
|
|
|
FCOMMON_OPT += -march=armv8.2-a -mtune=cortex-a72
|
|
|
|
|
endif
|
|
|
|
|
endif
|
|
|
|
|
else
|
2024-01-26 23:30:52 +08:00
|
|
|
CCOMMON_OPT += -march=armv8-a+sve -mtune=cortex-a72
|
2022-01-07 08:28:17 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
|
|
|
|
FCOMMON_OPT += -march=armv8-a -mtune=cortex-a72
|
|
|
|
|
endif
|
|
|
|
|
endif
|
|
|
|
|
endif
|
|
|
|
|
|
|
|
|
|
# Use a72 tunings because Neoverse-N2 is only available
|
2022-11-09 17:46:43 +08:00
|
|
|
# in GCC>=10.4
|
2022-01-07 08:28:17 +08:00
|
|
|
ifeq ($(CORE), NEOVERSEN2)
|
|
|
|
|
ifeq (1, $(filter 1,$(GCCVERSIONGTEQ7) $(ISCLANG)))
|
2023-07-13 14:38:03 +08:00
|
|
|
ifeq (1, $(filter 1,$(GCCVERSIONGTEQ10) $(ISCLANG)))
|
|
|
|
|
ifeq (1, $(filter 1,$(GCCMINORVERSIONGTEQ4) $(GCCVERSIONGTEQ11) $(ISCLANG)))
|
2022-08-31 04:26:16 +08:00
|
|
|
ifneq ($(OSNAME), Darwin)
|
2022-06-15 14:20:25 +08:00
|
|
|
CCOMMON_OPT += -march=armv8.5-a+sve+sve2+bf16 -mtune=neoverse-n2
|
2022-08-31 04:26:16 +08:00
|
|
|
else
|
2024-04-06 05:01:34 +08:00
|
|
|
CCOMMON_OPT += -march=armv8.2-a+sve+bf16 -mtune=cortex-a72
|
2022-08-31 04:26:16 +08:00
|
|
|
endif
|
2022-01-07 08:28:17 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
2022-06-29 10:08:06 +08:00
|
|
|
FCOMMON_OPT += -march=armv8.5-a+sve+sve2+bf16 -mtune=neoverse-n2
|
2022-01-07 08:28:17 +08:00
|
|
|
endif
|
|
|
|
|
else
|
2024-04-06 05:01:34 +08:00
|
|
|
CCOMMON_OPT += -march=armv8.5-a+sve+bf16
|
2024-01-16 05:40:21 +08:00
|
|
|
ifneq ($(CROSS), 1)
|
|
|
|
|
CCOMMON_OPT += -mtune=native
|
|
|
|
|
endif
|
2022-01-07 08:28:17 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
2024-01-16 05:40:21 +08:00
|
|
|
FCOMMON_OPT += -march=armv8.5-a
|
|
|
|
|
ifneq ($(CROSS), 1)
|
|
|
|
|
FCOMMON_OPT += -mtune=native
|
|
|
|
|
endif
|
2022-01-07 08:28:17 +08:00
|
|
|
endif
|
|
|
|
|
endif
|
|
|
|
|
else
|
2024-04-06 05:01:34 +08:00
|
|
|
CCOMMON_OPT += -march=armv8.2-a+sve+bf16 -mtune=cortex-a72
|
2022-01-07 08:28:17 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
|
|
|
|
FCOMMON_OPT += -march=armv8.2-a -mtune=cortex-a72
|
|
|
|
|
endif
|
|
|
|
|
endif
|
|
|
|
|
else
|
2024-04-06 05:01:34 +08:00
|
|
|
CCOMMON_OPT += -march=armv8-a+sve+bf16 -mtune=cortex-a72
|
2022-01-07 08:28:17 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
|
|
|
|
FCOMMON_OPT += -march=armv8-a -mtune=cortex-a72
|
|
|
|
|
endif
|
|
|
|
|
endif
|
|
|
|
|
endif
|
|
|
|
|
|
2024-05-16 17:59:52 +08:00
|
|
|
# Detect ARM Neoverse V2.
|
|
|
|
|
ifeq ($(CORE), NEOVERSEV2)
|
2025-07-24 19:30:43 +08:00
|
|
|
ifeq (1, $(filter 1,$(GCCVERSIONGTEQ13) $(ISCLANG)))
|
|
|
|
|
CCOMMON_OPT += -mcpu=neoverse-v2
|
|
|
|
|
ifneq ($(F_COMPILER), NAG)
|
|
|
|
|
FCOMMON_OPT += -mcpu=neoverse-v2
|
|
|
|
|
endif
|
|
|
|
|
else
|
|
|
|
|
CCOMMON_OPT += -march=armv8.2-a+sve+bf16 -mtune=neoverse-n1
|
2024-05-16 17:59:52 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
2025-07-24 19:30:43 +08:00
|
|
|
FCOMMON_OPT += -march=armv8.2-a -mtune=neoverse-n1
|
2024-05-16 17:59:52 +08:00
|
|
|
endif
|
|
|
|
|
endif
|
|
|
|
|
endif
|
|
|
|
|
|
2025-06-24 12:12:34 +08:00
|
|
|
# Detect Ampere AmpereOne(ampere1,ampere1a) processors.
|
2025-06-16 09:08:48 +08:00
|
|
|
ifeq ($(CORE), AMPERE1)
|
|
|
|
|
ifeq (1, $(filter 1,$(GCCVERSIONGTEQ12) $(ISCLANG)))
|
2025-06-24 12:12:34 +08:00
|
|
|
CCOMMON_OPT += -march=armv8.6-a+crypto+crc+fp16+sha3+rng
|
2025-06-16 09:08:48 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
2025-06-24 12:12:34 +08:00
|
|
|
FCOMMON_OPT += -march=armv8.6-a+crypto+crc+fp16+sha3+rng
|
2025-06-16 09:08:48 +08:00
|
|
|
endif
|
|
|
|
|
endif
|
|
|
|
|
endif
|
|
|
|
|
|
2021-06-20 03:37:51 +08:00
|
|
|
# Use a53 tunings because a55 is only available in GCC>=8.1
|
|
|
|
|
ifeq ($(CORE), CORTEXA55)
|
2021-10-18 06:26:14 +08:00
|
|
|
ifeq (1, $(filter 1,$(GCCVERSIONGTEQ7) $(ISCLANG)))
|
2023-07-13 14:38:03 +08:00
|
|
|
ifeq (1, $(filter 1,$(GCCVERSIONGTEQ8) $(ISCLANG)))
|
2021-06-20 03:37:51 +08:00
|
|
|
CCOMMON_OPT += -march=armv8.2-a -mtune=cortex-a55
|
|
|
|
|
ifneq ($(F_COMPILER), NAG)
|
|
|
|
|
FCOMMON_OPT += -march=armv8.2-a -mtune=cortex-a55
|
|
|
|
|
endif
|
|
|
|
|
else
|
|
|
|
|
CCOMMON_OPT += -march=armv8.2-a -mtune=cortex-a53
|
|
|
|
|
ifneq ($(F_COMPILER), NAG)
|
|
|
|
|
FCOMMON_OPT += -march=armv8.2-a -mtune=cortex-a53
|
|
|
|
|
endif
|
|
|
|
|
endif
|
|
|
|
|
else
|
|
|
|
|
CCOMMON_OPT += -march=armv8-a -mtune=cortex-a53
|
|
|
|
|
ifneq ($(F_COMPILER), NAG)
|
|
|
|
|
FCOMMON_OPT += -march=armv8-a -mtune=cortex-a53
|
|
|
|
|
endif
|
|
|
|
|
endif
|
|
|
|
|
endif
|
|
|
|
|
|
2017-01-10 14:27:36 +08:00
|
|
|
ifeq ($(CORE), THUNDERX)
|
Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
2018-11-16 23:45:12 +08:00
|
|
|
CCOMMON_OPT += -march=armv8-a -mtune=thunderx
|
2021-03-14 03:16:18 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
2018-11-16 23:45:12 +08:00
|
|
|
FCOMMON_OPT += -march=armv8-a -mtune=thunderx
|
|
|
|
|
endif
|
2021-03-14 03:16:18 +08:00
|
|
|
endif
|
Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
2018-11-16 23:45:12 +08:00
|
|
|
|
|
|
|
|
ifeq ($(CORE), FALKOR)
|
2018-12-06 02:51:38 +08:00
|
|
|
CCOMMON_OPT += -march=armv8-a -mtune=falkor
|
2021-03-14 03:16:18 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
2018-12-06 02:51:38 +08:00
|
|
|
FCOMMON_OPT += -march=armv8-a -mtune=falkor
|
2017-01-10 14:27:36 +08:00
|
|
|
endif
|
2021-03-14 03:16:18 +08:00
|
|
|
endif
|
2017-01-10 16:55:55 +08:00
|
|
|
|
|
|
|
|
ifeq ($(CORE), THUNDERX2T99)
|
Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
2018-11-16 23:45:12 +08:00
|
|
|
CCOMMON_OPT += -march=armv8.1-a -mtune=thunderx2t99
|
2021-03-14 03:16:18 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
2018-11-16 23:45:12 +08:00
|
|
|
FCOMMON_OPT += -march=armv8.1-a -mtune=thunderx2t99
|
2017-01-10 16:55:55 +08:00
|
|
|
endif
|
2021-03-14 03:16:18 +08:00
|
|
|
endif
|
2019-03-04 16:41:21 +08:00
|
|
|
|
2020-06-11 19:12:49 +08:00
|
|
|
ifeq ($(CORE), THUNDERX3T110)
|
2023-07-13 14:38:03 +08:00
|
|
|
ifeq (1, $(filter 1,$(GCCVERSIONGTEQ10) $(ISCLANG)))
|
|
|
|
|
CCOMMON_OPT += -march=armv8.3-a
|
|
|
|
|
ifeq (0, $(ISCLANG))
|
|
|
|
|
CCOMMON_OPT += -mtune=thunderx3t110
|
|
|
|
|
else
|
|
|
|
|
CCOMMON_OPT += -mtune=thunderx2t99
|
|
|
|
|
endif
|
2021-03-14 03:16:18 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
2020-06-11 19:12:49 +08:00
|
|
|
FCOMMON_OPT += -march=armv8.3-a -mtune=thunderx3t110
|
2021-03-14 03:16:18 +08:00
|
|
|
endif
|
2020-06-11 19:12:49 +08:00
|
|
|
else
|
|
|
|
|
CCOMMON_OPT += -march=armv8.1-a -mtune=thunderx2t99
|
2021-03-14 03:16:18 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
2020-06-11 19:12:49 +08:00
|
|
|
FCOMMON_OPT += -march=armv8.1-a -mtune=thunderx2t99
|
|
|
|
|
endif
|
|
|
|
|
endif
|
2021-03-14 03:16:18 +08:00
|
|
|
endif
|
2020-06-11 19:12:49 +08:00
|
|
|
|
2020-09-03 14:38:08 +08:00
|
|
|
ifeq ($(CORE), VORTEX)
|
2020-09-03 04:52:12 +08:00
|
|
|
CCOMMON_OPT += -march=armv8.3-a
|
2021-03-14 03:16:18 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
2020-09-03 04:52:12 +08:00
|
|
|
FCOMMON_OPT += -march=armv8.3-a
|
|
|
|
|
endif
|
2021-03-14 03:16:18 +08:00
|
|
|
endif
|
2020-09-03 04:52:12 +08:00
|
|
|
|
2025-08-18 16:51:10 +08:00
|
|
|
ifeq ($(CORE), VORTEXM4)
|
2025-10-20 04:31:30 +08:00
|
|
|
ifneq ($(C_COMPILER), GCC)
|
2025-08-18 16:51:10 +08:00
|
|
|
CCOMMON_OPT += -march=armv8.4-a+sme
|
2025-10-20 04:31:30 +08:00
|
|
|
else
|
|
|
|
|
CCOMMON_OPT += -march=armv8.4-a
|
|
|
|
|
endif
|
2025-10-02 20:11:34 +08:00
|
|
|
FCOMMON_OPT += -march=armv8.4-a
|
2025-08-18 16:51:10 +08:00
|
|
|
endif
|
|
|
|
|
|
2021-10-18 06:26:14 +08:00
|
|
|
ifeq (1, $(filter 1,$(GCCVERSIONGTEQ9) $(ISCLANG)))
|
2019-03-04 16:41:21 +08:00
|
|
|
ifeq ($(CORE), TSV110)
|
|
|
|
|
CCOMMON_OPT += -march=armv8.2-a -mtune=tsv110
|
2021-03-14 03:16:18 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
2019-03-04 16:41:21 +08:00
|
|
|
FCOMMON_OPT += -march=armv8.2-a -mtune=tsv110
|
|
|
|
|
endif
|
2019-12-04 18:06:03 +08:00
|
|
|
endif
|
2021-01-12 23:34:18 +08:00
|
|
|
endif
|
2021-05-16 17:49:13 +08:00
|
|
|
|
2023-07-13 14:38:03 +08:00
|
|
|
ifeq (1, $(filter 1,$(GCCVERSIONGTEQ9) $(ISCLANG)))
|
2021-05-16 17:49:13 +08:00
|
|
|
ifeq ($(CORE), EMAG8180)
|
2023-07-13 14:38:03 +08:00
|
|
|
CCOMMON_OPT += -march=armv8-a
|
|
|
|
|
ifeq ($(ISCLANG), 0)
|
|
|
|
|
CCOMMON_OPT += -mtune=emag
|
|
|
|
|
endif
|
2021-05-16 17:49:13 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
|
|
|
|
FCOMMON_OPT += -march=armv8-a -mtune=emag
|
|
|
|
|
endif
|
|
|
|
|
endif
|
|
|
|
|
endif
|
2021-07-23 19:42:52 +08:00
|
|
|
|
2021-10-18 21:00:19 +08:00
|
|
|
ifeq ($(CORE), A64FX)
|
2024-07-29 18:14:25 +08:00
|
|
|
ifeq (1, $(filter 1,$(GCCVERSIONGTEQ10) $(ISCLANG)))
|
2024-07-29 22:28:59 +08:00
|
|
|
ifeq (1, $(filter 1,$(GCCMINORVERSIONGTEQ3) $(GCCVERSIONGTEQ11) $(ISCLANG)))
|
2021-10-20 05:23:40 +08:00
|
|
|
CCOMMON_OPT += -march=armv8.2-a+sve -mtune=a64fx
|
2021-10-18 21:00:19 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
2021-10-20 05:23:40 +08:00
|
|
|
FCOMMON_OPT += -march=armv8.2-a+sve -mtune=a64fx
|
2021-10-18 21:00:19 +08:00
|
|
|
endif
|
2024-07-29 18:14:25 +08:00
|
|
|
else
|
|
|
|
|
CCOMMON_OPT += -march=armv8.4-a+sve -mtune=neoverse-n1
|
|
|
|
|
ifneq ($(F_COMPILER), NAG)
|
|
|
|
|
FCOMMON_OPT += -march=armv8.4-a -mtune=neoverse-n1
|
|
|
|
|
endif
|
|
|
|
|
endif
|
2021-10-18 21:00:19 +08:00
|
|
|
endif
|
|
|
|
|
endif
|
|
|
|
|
|
2022-03-27 21:24:40 +08:00
|
|
|
ifeq (1, $(filter 1,$(GCCVERSIONGTEQ11) $(ISCLANG)))
|
|
|
|
|
ifeq ($(CORE), CORTEXX1)
|
2024-03-11 06:19:56 +08:00
|
|
|
CCOMMON_OPT += -march=armv8.2-a
|
|
|
|
|
ifeq (1, $(filter 1,$(GCCMINORVERSIONGTEQ4) $(GCCVERSIONGTEQ12) $(ISCLANG)))
|
|
|
|
|
CCOMMON_OPT += -mtune=cortex-x1
|
|
|
|
|
ifneq ($(F_COMPILER), NAG)
|
|
|
|
|
FCOMMON_OPT += -march=armv8.2-a -mtune=cortex-x1
|
|
|
|
|
endif
|
|
|
|
|
else
|
|
|
|
|
CCOMMON_OPT += -mtune=cortex-a72
|
2022-03-27 21:24:40 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
2024-03-11 06:19:56 +08:00
|
|
|
FCOMMON_OPT += -march=armv8.2-a -mtune=cortex-a72
|
|
|
|
|
endif
|
2022-03-27 21:24:40 +08:00
|
|
|
endif
|
|
|
|
|
endif
|
|
|
|
|
endif
|
|
|
|
|
|
|
|
|
|
ifeq (1, $(filter 1,$(GCCVERSIONGTEQ11) $(ISCLANG)))
|
|
|
|
|
ifeq ($(CORE), CORTEXX2)
|
2022-03-28 23:18:56 +08:00
|
|
|
CCOMMON_OPT += -march=armv8.4-a+sve
|
2022-03-27 21:24:40 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
2022-03-28 23:18:56 +08:00
|
|
|
FCOMMON_OPT += -march=armv8.4-a+sve
|
2022-03-27 21:24:40 +08:00
|
|
|
endif
|
2024-03-11 06:19:56 +08:00
|
|
|
ifeq (1, $(filter 1,$(GCCVERSIONGTEQ12) $(ISCLANG)))
|
|
|
|
|
CCOMMON_OPT += -mtune=cortex-x2
|
|
|
|
|
ifneq ($(F_COMPILER), NAG)
|
|
|
|
|
FCOMMON_OPT += -mtune=cortex-x2
|
|
|
|
|
endif
|
|
|
|
|
endif
|
2022-03-27 21:24:40 +08:00
|
|
|
endif
|
|
|
|
|
endif
|
|
|
|
|
|
|
|
|
|
#ifeq (1, $(filter 1,$(ISCLANG)))
|
|
|
|
|
ifeq (1, $(filter 1,$(GCCVERSIONGTEQ11) $(ISCLANG)))
|
|
|
|
|
ifeq ($(CORE), CORTEXA510)
|
|
|
|
|
CCOMMON_OPT += -march=armv8.4-a+sve
|
|
|
|
|
ifneq ($(F_COMPILER), NAG)
|
|
|
|
|
FCOMMON_OPT += -march=armv8.4-a+sve
|
|
|
|
|
endif
|
|
|
|
|
endif
|
|
|
|
|
endif
|
|
|
|
|
|
|
|
|
|
ifeq (1, $(filter 1,$(GCCVERSIONGTEQ11) $(ISCLANG)))
|
|
|
|
|
ifeq ($(CORE), CORTEXA710)
|
2022-03-28 23:18:56 +08:00
|
|
|
CCOMMON_OPT += -march=armv8.4-a+sve
|
2022-03-27 21:24:40 +08:00
|
|
|
ifneq ($(F_COMPILER), NAG)
|
2022-03-28 23:18:56 +08:00
|
|
|
FCOMMON_OPT += -march=armv8.4-a+sve
|
2022-03-27 21:24:40 +08:00
|
|
|
endif
|
2024-03-11 06:19:56 +08:00
|
|
|
ifeq (1, $(filter 1,$(GCCVERSIONGTEQ12) $(ISCLANG)))
|
|
|
|
|
CCOMMON_OPT += -mtune=cortex-a710
|
|
|
|
|
ifneq ($(F_COMPILER), NAG)
|
|
|
|
|
FCOMMON_OPT += -mtune=cortex-a710
|
|
|
|
|
endif
|
|
|
|
|
endif
|
2022-03-27 21:24:40 +08:00
|
|
|
endif
|
|
|
|
|
endif
|
|
|
|
|
|
2021-03-14 03:16:18 +08:00
|
|
|
endif
|
2021-07-23 19:42:52 +08:00
|
|
|
|
2024-12-20 06:32:24 +08:00
|
|
|
else
|
|
|
|
|
# NVIDIA HPC options necessary to enable SVE in the compiler
|
|
|
|
|
ifeq ($(CORE), THUNDERX2T99)
|
|
|
|
|
CCOMMON_OPT += -tp=thunderx2t99
|
|
|
|
|
FCOMMON_OPT += -tp=thunderx2t99
|
|
|
|
|
endif
|
|
|
|
|
ifeq ($(CORE), NEOVERSEN1)
|
|
|
|
|
CCOMMON_OPT += -tp=neoverse-n1
|
|
|
|
|
FCOMMON_OPT += -tp=neoverse-n1
|
|
|
|
|
endif
|
|
|
|
|
ifeq ($(CORE), NEOVERSEV1)
|
|
|
|
|
CCOMMON_OPT += -tp=neoverse-v1
|
|
|
|
|
FCOMMON_OPT += -tp=neoverse-v1
|
|
|
|
|
endif
|
|
|
|
|
ifeq ($(CORE), NEOVERSEV2)
|
|
|
|
|
CCOMMON_OPT += -tp=neoverse-v2
|
|
|
|
|
FCOMMON_OPT += -tp=neoverse-v2
|
|
|
|
|
endif
|
|
|
|
|
ifeq ($(CORE), ARMV8SVE)
|
|
|
|
|
CCOMMON_OPT += -tp=neoverse-v2
|
|
|
|
|
FCOMMON_OPT += -tp=neoverse-v2
|
|
|
|
|
endif
|
|
|
|
|
ifeq ($(CORE), ARMV9SVE)
|
|
|
|
|
CCOMMON_OPT += -tp=neoverse-v2
|
|
|
|
|
FCOMMON_OPT += -tp=neoverse-v2
|
|
|
|
|
endif
|
|
|
|
|
|
2021-10-20 05:23:40 +08:00
|
|
|
endif
|