forked from mindspore-Ecosystem/mindspore
[MSLITE] fp32 int and uint bug
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e6e544dbc4
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@ -21,10 +21,10 @@ void PostConvFuncComm(const float *src_ptr_, float *out_ptr, const float *bias_p
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if (size == 0) {
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return;
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}
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for (int oc = 0; oc < output_channel; oc++) {
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for (size_t oc = 0; oc < output_channel; oc++) {
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int oc_div = oc / size;
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int oc_mod = oc % size;
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for (int hw = 0; hw < plane_size; hw++) {
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for (int hw = 0; hw < (int)plane_size; hw++) {
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int src_index = oc_div * size * plane_stride + hw * size + oc_mod;
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int dst_index = hw * oc_stride + oc;
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float value = src_ptr_[src_index];
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@ -52,7 +52,8 @@ int ConvDw(float *output_data, const float *input_data, const float *weight_data
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int end_kh = MSMIN(conv_param->kernel_h_, UP_DIV(conv_param->input_h_ - ih_origin, conv_param->dilation_h_));
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for (int ow = 0; ow < conv_param->output_w_; ow++) {
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memcpy(dst_data + ow * conv_param->output_channel_, bias_data, conv_param->output_channel_ * sizeof(float));
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memcpy(dst_data + ow * conv_param->output_channel_, bias_data,
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conv_param->output_channel_ * (int)(sizeof(float)));
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}
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for (int kh = start_kh; kh < end_kh; kh++) {
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int ih = ih_origin + conv_param->dilation_w_ * kh;
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@ -764,10 +765,10 @@ void ConvDwFp32IndirectRow(float *output, float **input, const float *weights, c
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int output_width, int input_stride, bool relu, bool relu6, int kernel) {
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do {
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float **in = input;
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size_t c = channels;
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size_t c = (size_t)channels;
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const float *w = weights;
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float *out = output;
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memcpy(out, bias, channels * sizeof(float));
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memcpy(out, bias, channels * (int)sizeof(float));
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for (; c >= C4NUM; c -= C4NUM) {
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for (int i = 0; i < C4NUM; i++) {
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for (int k = 0; k < kernel; k++) {
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@ -61,7 +61,7 @@ void DeConvPostFp32C8(const float *src, float *tmp, const float *bias, float *ds
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for (int c = 0; c < oc8; c += 8) {
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float *dst_ptr = tmp + c * output_plane;
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const float *src_ptr = src + c * in_plane_round * kernel_plane;
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memset(dst_ptr, 0, output_plane * C8NUM * sizeof(float));
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memset(dst_ptr, 0, output_plane * C8NUM * (int)sizeof(float));
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for (int ih = 0; ih < conv_param->input_h_; ih++) {
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for (int iw = 0; iw < conv_param->input_w_; iw++) {
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@ -41,7 +41,7 @@ void PackLstmBias(float *dst, const float *src, int batch, int col, int col_alig
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for (int i = 0; i < unidirectional_batch; i++) {
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const float *src_batch = src + i * col;
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float *dst_batch = dst + i * col_align;
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memcpy(dst_batch, src_batch, col * sizeof(float));
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memcpy(dst_batch, src_batch, col * (int)sizeof(float));
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}
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if (is_bidirectional) {
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const float *backward_src = src + batch * col;
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@ -104,7 +104,8 @@ void LiteOpActor::IsolateInputData(std::vector<std::shared_ptr<LiteOpActor>> *ac
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Tensor *new_tensor = new Tensor(new_data_type, old_tensor->shape(), old_tensor->format(), old_tensor->category());
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new_tensor->set_allocator(old_tensor->allocator());
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if (new_tensor->allocator() == nullptr && kernel_->Context() != nullptr) {
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if (new_tensor->allocator() == nullptr && kernel_->Context() != nullptr &&
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kernel_->desc().arch != kernel::kDelegate) {
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new_tensor->set_allocator(kernel_->Context()->allocator);
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}
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