diff --git a/.github/image/600480230.jpg b/.github/image/600480230.jpg
index de4b549..12b3fa3 100644
Binary files a/.github/image/600480230.jpg and b/.github/image/600480230.jpg differ
diff --git a/Readme.md b/Readme.md
index 86b44b3..ee89501 100644
--- a/Readme.md
+++ b/Readme.md
@@ -1,12 +1,10 @@
# The first phase of Open Verification for the Kunminghu microarchitecture of Xiangshan: Kunminghu's BPU Module UT Verification in Action.
-[中文文档](/Readme_cn.md)
+[中文文档](./Readme_cn.md)
This project aims to explore open-sourced subdivision verification of the high-performance open-source RISC-V OpenXiangshan processor's microarchitecture. It introduces new tools and methods based on Python, enabling all students interested in chip design and verification to quickly grasp and study the XiangShan microarchitecture. This phase provides a detailed introduction to the principles and implementation of the branch prediction module of the XiangShan Kunminghu architecture, along with the corresponding open-source verification environment. Participants in this phase can earn points and rewards by submitting bugs, writing verification reports, and more.
-**The Open-Verify Porject Official Website：[open-verify.cc](https://open-verify.cc)**
-
-**Gitlink Event：[https://www.gitlink.org.cn/glcc/2023/subjects/detail/473](https://www.gitlink.org.cn/glcc/2023/subjects/detail/473)**
+**The Open Verification Porject website：[open-verify.cc](https://open-verify.cc)**
## Introduction
@@ -15,13 +13,13 @@ This project utilizes open-source tools for the open verification of open-source
## Kunminghu microarchitecture
-The Kunming Lake architecture is the third-generation high-performance microarchitecture of the XiangShan open-source processor. For the architecture diagram, please refer to the [Kunminghu architecture diagram](https://github.com/OpenXiangShan/XiangShan/raw/kunminghu/images/xs-arch-nanhu.svg).
+The Kunminghu architecture is the third-generation high-performance microarchitecture of the XiangShan open-source processor. For the architecture diagram, please refer to the [Kunminghu architecture diagram](https://github.com/OpenXiangShan/XiangShan/raw/kunminghu/images/xs-arch-nanhu.svg).
## Chip verification
Chip validation is a crucial aspect of chip design work. Skipping or insufficient validation can result in chip fabrication failures or products not meeting standards, leading to significant losses. Chip design companies treat chip design as proprietary business secrets, and chip validation typically requires access to the chip design source code. Therefore, chip validation work can only be conducted internally within the company. However, with the open-source nature of the Shanhai high-performance RISC-V chip, concerns about "leaking proprietary secrets" do not arise. Consequently, chip validation work can be distributed in a manner similar to software subcontracting or crowdsourcing, allowing interested individuals to participate remotely.
-## Related documents
+## Learning resources
1. [Basic Learning Materials](https://open-verify.cc/mlvp/docs/): Learn about chip validation and how to use Python for validation.
@@ -36,38 +34,33 @@ The structure of this repository directory and corresponding explanations are as
```bash
.
-├── LICENSE
-├── Makefile
-├── Readme.md
-├── Readme_cn.md
-├── doc
-├── image
-├── mk # Sub makefiles
-├── out # DUT output
-└── src # DUT source code
+├── doc
+├── image
+├── LICENSE
+├── Makefile
+├── mk # Sub Makefiles
+├── Readme_cn.md
+├── Readme.md
+├── tests # Tests dir <- put your test code here !
+│ ├── Makefile # Test Makefile
+│ ├── conftest.py # Pytest config
+│ ├── README.md # Test readme
+│ ├── uFTB_raw # Example 1
+│ └── uftb-with-ftq # Example 2
+└── utils # Tools you may need
+ ├── BRTParser # Branc trace parser
+ └── ready-to-run # Binary files to run (trace source)
```
**Note: Since this project requires submitting results via PR, please make sure to organize the data according to the directory requirements mentioned above.**
-## Discussion group
-To prevent spam advertisements in the group, please run the following Python code to get the group number.
+## Join Us
-QQ group
-```python
-import base64
-base64.b64decode('Your_Base64_Data_Here').decode()
-```
+Please visit the following link to sign up for this event.
-Wechat group
-```python
-import base64
-from io import BytesIO
-from PIL import Image
-base64_image_data = \
-"Your_Base64_Image_Data_Here_0"\
-"Your_Base64_Image_Data_Here_1"
-image_data = base64.b64decode(base64_image_data)
-image = Image.open(BytesIO(image_data))
-image.show()
-```
+[Sign up](https://iz9a87wn37.feishu.cn/share/base/form/shrcnwpiyWaVUzyo47QdPBGy5Yd)
+
+## The QQ discussion group: 600480230
+
+
diff --git a/Readme_cn.md b/Readme_cn.md
index 7994536..0598aeb 100644
--- a/Readme_cn.md
+++ b/Readme_cn.md
@@ -8,8 +8,6 @@
**开源开放验证官网：[open-verify.cc](https://open-verify.cc)**
-**Gitlink活动地址：[https://www.gitlink.org.cn/glcc/2023/subjects/detail/473](https://www.gitlink.org.cn/glcc/2023/subjects/detail/473)**
-
## 简介
@@ -23,7 +21,7 @@
芯片验证是芯片设计工作中的重点，跳过验证或者验证的不够，会导致流片失败或者芯片产品不达标，带来巨大损失。芯片设计公司把芯片设计当成核心商业机密，而芯片验证通常需要基于芯片设计源代码，因此芯片验证工作只能在公司内部进行。开源香山高性能risc-v芯片不存在“商业机密泄露”等问题，因此可以把芯片验证工作以类似软件分包、众包的方式进行分发，让感兴趣的人远程参与。
-## 相关文档
+## 学习材料
1. **[基础学习材料](https://open-verify.cc/mlvp/docs/)**，学习什么是芯片验证，如何使用Python进行验证。
1. **[香山BPU介绍](https://open-verify.cc/xs-bpu/docs/)**，学习什么是分支预测，香山处理器中采用了哪些基础预测器。
@@ -63,6 +61,6 @@
[报名问卷](https://iz9a87wn37.feishu.cn/share/base/form/shrcnwpiyWaVUzyo47QdPBGy5Yd)
-## 加入讨论群
+## 加入讨QQ论群: 600480230
-
\ No newline at end of file
+
diff --git a/doc/env_cn.md b/doc/env_cn.md
index 1cadfcc..ab11f13 100644
--- a/doc/env_cn.md
+++ b/doc/env_cn.md
@@ -15,8 +15,8 @@
除去基本的gcc/python3开发环境外，本验仓库还依赖如下两个项目，请先行安装，**并安装对应项目的依赖**。
-1. [Picker](https://github.com/XS-MLVP/picker)
-2. [MLVP](https://github.com/XS-MLVP/mlvp)
+1. [picker](https://github.com/XS-MLVP/picker)
+2. [mlvp](https://github.com/XS-MLVP/mlvp)
再通过以下命令安装其他依赖：
```bash
@@ -128,7 +128,7 @@ make TEST=uFTB_raw run
该命令会自动运行 `uFTB_raw` 测试用例，并生成波形、覆盖率和测试报告等信息。测试报告会被保存在 `tests/report` 目录中，可通过浏览器打开 `tests/report/report.html` 查看本次测试报告内容，测试报告样式如下图所示，其余文件也会在 `tests` 目录下生成。
-
+
+
#### （0）在线报名
diff --git a/image b/image
deleted file mode 120000
index 737f556..0000000
--- a/image
+++ /dev/null
@@ -1 +0,0 @@
-.github/image
\ No newline at end of file