diff --git a/mk/FTB.mk b/mk/FTB.mk
index 8231a91..3cc1968 100644
--- a/mk/FTB.mk
+++ b/mk/FTB.mk
@@ -1,5 +1,5 @@
-TOP_ENTRY := ./rtl_src/FTB/FTB.sv
-TOP_FILES := ./rtl_src/FTB.txt
+TOP_ENTRY := ./rtl/FTB/FTB.sv
+TOP_FILES := ./rtl/FTB.txt
 TL ?= cpp
 
 ifneq ($(TARGET),)
@@ -40,8 +40,6 @@ ftb:
 
 	@mkdir -p out
 	rm -rf ${TARGET} 
-	picker ${TOP_ENTRY} -f ${TOP_FILES} -l ${TL} \
+	picker ${TOP_ENTRY} -f ${TOP_FILES} -l ${TL} -c\
 		 -t ${TARGET} ${_WAVEFORM}${_EXAMPLE} ${_VERBOSE}
-		
-	cd ${TARGET} && make
 
diff --git a/mk/ITTAGE.mk b/mk/ITTAGE.mk
index ddf096d..6e257cc 100644
--- a/mk/ITTAGE.mk
+++ b/mk/ITTAGE.mk
@@ -1,5 +1,5 @@
-TOP_ENTRY := ./rtl_src/ITTAGE/ITTage.sv
-TOP_FILES := ./rtl_src/ITTAGE.txt
+TOP_ENTRY := ./rtl/ITTAGE/ITTage.sv
+TOP_FILES := ./rtl/ITTAGE.txt
 TL ?= cpp
 
 ifneq ($(TARGET),)
@@ -40,8 +40,6 @@ ittage:
 
 	@mkdir -p out
 	rm -rf ${TARGET} 
-	picker ${TOP_ENTRY} -f ${TOP_FILES} -l ${TL} \
+	picker ${TOP_ENTRY} -f ${TOP_FILES} -l ${TL} -c\
 		 -t ${TARGET} ${_WAVEFORM}${_EXAMPLE} ${_VERBOSE}
-		
-	cd ${TARGET} && make
 
diff --git a/mk/RAS.mk b/mk/RAS.mk
index 57b722b..ffd6bf0 100644
--- a/mk/RAS.mk
+++ b/mk/RAS.mk
@@ -1,5 +1,5 @@
-TOP_ENTRY := ./rtl_src/RAS/RAS.sv
-TOP_FILES := ./rtl_src/RAS.txt
+TOP_ENTRY := ./rtl/RAS/RAS.sv
+TOP_FILES := ./rtl/RAS.txt
 TL ?= cpp
 
 ifneq ($(TARGET),)
@@ -40,8 +40,6 @@ ras:
 
 	@mkdir -p out
 	rm -rf ${TARGET} 
-	picker ${TOP_ENTRY} -f ${TOP_FILES} -l ${TL} \
+	picker ${TOP_ENTRY} -f ${TOP_FILES} -l ${TL} -c\
 		 -t ${TARGET} ${_WAVEFORM}${_EXAMPLE} ${_VERBOSE}
 		
-	cd ${TARGET} && make
-
diff --git a/mk/Tage.mk b/mk/Tage.mk
index 5dd4ad6..dd00ff1 100644
--- a/mk/Tage.mk
+++ b/mk/Tage.mk
@@ -1,5 +1,5 @@
-TOP_ENTRY := ./rtl_src/TageSC/Tage_SC.sv
-TOP_FILES := ./rtl_src/Tage_SC.txt
+TOP_ENTRY := ./rtl/TageSC/Tage_SC.sv
+TOP_FILES := ./rtl/Tage_SC.txt
 TL ?= cpp
 
 ifneq ($(TARGET),)
@@ -40,8 +40,6 @@ tage_sc:
 
 	@mkdir -p out
 	rm -rf ${TARGET} 
-	picker ${TOP_ENTRY} -f ${TOP_FILES} -l ${TL} \
+	picker ${TOP_ENTRY} -f ${TOP_FILES} -l ${TL} -c\
 		 -t ${TARGET} ${_WAVEFORM}${_EXAMPLE} ${_VERBOSE}
 		
-	cd ${TARGET} && make
-
diff --git a/mk/uFTB.mk b/mk/uFTB.mk
index 0bd2473..f9d1f50 100644
--- a/mk/uFTB.mk
+++ b/mk/uFTB.mk
@@ -1,5 +1,5 @@
-TOP_ENTRY := ./rtl_src/uFTB/FauFTB.sv
-TOP_FILES := ./rtl_src/uFTB.txt
+TOP_ENTRY := ./rtl/uFTB/FauFTB.sv
+TOP_FILES := ./rtl/uFTB.txt
 TL ?= cpp
 
 ifneq ($(TARGET),)
@@ -40,8 +40,6 @@ uftb:
 
 	@mkdir -p out
 	rm -rf ${TARGET} 
-	picker ${TOP_ENTRY} -f ${TOP_FILES} -l ${TL} \
+	picker ${TOP_ENTRY} -f ${TOP_FILES} -l ${TL} -c\
 		 -t ${TARGET} ${_WAVEFORM}${_EXAMPLE} ${_VERBOSE}
 		
-	cd ${TARGET} && make
-
diff --git a/rtl/FTB.txt b/rtl/FTB.txt
new file mode 100644
index 0000000..f60568f
--- /dev/null
+++ b/rtl/FTB.txt
@@ -0,0 +1,9 @@
+./rtl/FTB/FTBBank.sv
+./rtl/FTB/FTBEntryGen.sv
+./rtl/FTB/SRAMTemplate_9.sv
+./rtl/FTB/array_3.sv
+./rtl/common/ext_sram.v
+./rtl/common/DelayN_2.sv
+./rtl/common/DelayN_4.sv
+./rtl/common/DelayN_5.sv
+./rtl/common/DelayN_6.sv
diff --git a/rtl_src/FTB/FTB.sv b/rtl/FTB/FTB.sv
similarity index 100%
rename from rtl_src/FTB/FTB.sv
rename to rtl/FTB/FTB.sv
diff --git a/rtl_src/FTB/FTBBank.sv b/rtl/FTB/FTBBank.sv
similarity index 100%
rename from rtl_src/FTB/FTBBank.sv
rename to rtl/FTB/FTBBank.sv
diff --git a/rtl_src/FTB/FTBEntryGen.sv b/rtl/FTB/FTBEntryGen.sv
similarity index 100%
rename from rtl_src/FTB/FTBEntryGen.sv
rename to rtl/FTB/FTBEntryGen.sv
diff --git a/rtl_src/FTB/SRAMTemplate_9.sv b/rtl/FTB/SRAMTemplate_9.sv
similarity index 100%
rename from rtl_src/FTB/SRAMTemplate_9.sv
rename to rtl/FTB/SRAMTemplate_9.sv
diff --git a/rtl_src/FTB/array_3.sv b/rtl/FTB/array_3.sv
similarity index 100%
rename from rtl_src/FTB/array_3.sv
rename to rtl/FTB/array_3.sv
diff --git a/rtl/ITTAGE.txt b/rtl/ITTAGE.txt
new file mode 100644
index 0000000..dc92507
--- /dev/null
+++ b/rtl/ITTAGE.txt
@@ -0,0 +1,24 @@
+./rtl/ITTAGE/CAMTemplate_41.sv
+./rtl/ITTAGE/CAMTemplate_43.sv
+./rtl/ITTAGE/Folded1WDataModuleTemplate.sv
+./rtl/ITTAGE/Folded1WDataModuleTemplate_2.sv
+./rtl/ITTAGE/FoldedSRAMTemplate_21.sv
+./rtl/ITTAGE/FoldedSRAMTemplate_25.sv
+./rtl/ITTAGE/ITTage.sv
+./rtl/ITTAGE/ITTageTable.sv
+./rtl/ITTAGE/ITTageTable_1.sv
+./rtl/ITTAGE/ITTageTable_2.sv
+./rtl/ITTAGE/ITTageTable_3.sv
+./rtl/ITTAGE/ITTageTable_4.sv
+./rtl/ITTAGE/SRAMTemplate_35.sv
+./rtl/ITTAGE/SRAMTemplate_39.sv
+./rtl/ITTAGE/WrBypass_41.sv
+./rtl/ITTAGE/WrBypass_43.sv
+./rtl/ITTAGE/array_0_0.sv
+./rtl/ITTAGE/array_8.sv
+./rtl/ITTAGE/data_16x16.sv
+./rtl/ITTAGE/data_32x16.sv
+./rtl/ITTAGE/data_mem_0_4x2.sv
+#
+./rtl/common/ext_sram.v
+./rtl/common/DelayN_2.sv
diff --git a/rtl_src/ITTAGE/CAMTemplate_41.sv b/rtl/ITTAGE/CAMTemplate_41.sv
similarity index 100%
rename from rtl_src/ITTAGE/CAMTemplate_41.sv
rename to rtl/ITTAGE/CAMTemplate_41.sv
diff --git a/rtl_src/ITTAGE/CAMTemplate_43.sv b/rtl/ITTAGE/CAMTemplate_43.sv
similarity index 100%
rename from rtl_src/ITTAGE/CAMTemplate_43.sv
rename to rtl/ITTAGE/CAMTemplate_43.sv
diff --git a/rtl_src/ITTAGE/Folded1WDataModuleTemplate.sv b/rtl/ITTAGE/Folded1WDataModuleTemplate.sv
similarity index 100%
rename from rtl_src/ITTAGE/Folded1WDataModuleTemplate.sv
rename to rtl/ITTAGE/Folded1WDataModuleTemplate.sv
diff --git a/rtl_src/ITTAGE/Folded1WDataModuleTemplate_2.sv b/rtl/ITTAGE/Folded1WDataModuleTemplate_2.sv
similarity index 100%
rename from rtl_src/ITTAGE/Folded1WDataModuleTemplate_2.sv
rename to rtl/ITTAGE/Folded1WDataModuleTemplate_2.sv
diff --git a/rtl_src/ITTAGE/FoldedSRAMTemplate_21.sv b/rtl/ITTAGE/FoldedSRAMTemplate_21.sv
similarity index 100%
rename from rtl_src/ITTAGE/FoldedSRAMTemplate_21.sv
rename to rtl/ITTAGE/FoldedSRAMTemplate_21.sv
diff --git a/rtl_src/ITTAGE/FoldedSRAMTemplate_25.sv b/rtl/ITTAGE/FoldedSRAMTemplate_25.sv
similarity index 100%
rename from rtl_src/ITTAGE/FoldedSRAMTemplate_25.sv
rename to rtl/ITTAGE/FoldedSRAMTemplate_25.sv
diff --git a/rtl_src/ITTAGE/ITTage.sv b/rtl/ITTAGE/ITTage.sv
similarity index 100%
rename from rtl_src/ITTAGE/ITTage.sv
rename to rtl/ITTAGE/ITTage.sv
diff --git a/rtl_src/ITTAGE/ITTageTable.sv b/rtl/ITTAGE/ITTageTable.sv
similarity index 100%
rename from rtl_src/ITTAGE/ITTageTable.sv
rename to rtl/ITTAGE/ITTageTable.sv
diff --git a/rtl_src/ITTAGE/ITTageTable_1.sv b/rtl/ITTAGE/ITTageTable_1.sv
similarity index 100%
rename from rtl_src/ITTAGE/ITTageTable_1.sv
rename to rtl/ITTAGE/ITTageTable_1.sv
diff --git a/rtl_src/ITTAGE/ITTageTable_2.sv b/rtl/ITTAGE/ITTageTable_2.sv
similarity index 100%
rename from rtl_src/ITTAGE/ITTageTable_2.sv
rename to rtl/ITTAGE/ITTageTable_2.sv
diff --git a/rtl_src/ITTAGE/ITTageTable_3.sv b/rtl/ITTAGE/ITTageTable_3.sv
similarity index 100%
rename from rtl_src/ITTAGE/ITTageTable_3.sv
rename to rtl/ITTAGE/ITTageTable_3.sv
diff --git a/rtl_src/ITTAGE/ITTageTable_4.sv b/rtl/ITTAGE/ITTageTable_4.sv
similarity index 100%
rename from rtl_src/ITTAGE/ITTageTable_4.sv
rename to rtl/ITTAGE/ITTageTable_4.sv
diff --git a/rtl_src/ITTAGE/SRAMTemplate_35.sv b/rtl/ITTAGE/SRAMTemplate_35.sv
similarity index 100%
rename from rtl_src/ITTAGE/SRAMTemplate_35.sv
rename to rtl/ITTAGE/SRAMTemplate_35.sv
diff --git a/rtl_src/ITTAGE/SRAMTemplate_39.sv b/rtl/ITTAGE/SRAMTemplate_39.sv
similarity index 100%
rename from rtl_src/ITTAGE/SRAMTemplate_39.sv
rename to rtl/ITTAGE/SRAMTemplate_39.sv
diff --git a/rtl_src/ITTAGE/WrBypass_41.sv b/rtl/ITTAGE/WrBypass_41.sv
similarity index 100%
rename from rtl_src/ITTAGE/WrBypass_41.sv
rename to rtl/ITTAGE/WrBypass_41.sv
diff --git a/rtl_src/ITTAGE/WrBypass_43.sv b/rtl/ITTAGE/WrBypass_43.sv
similarity index 100%
rename from rtl_src/ITTAGE/WrBypass_43.sv
rename to rtl/ITTAGE/WrBypass_43.sv
diff --git a/rtl_src/ITTAGE/array_0_0.sv b/rtl/ITTAGE/array_0_0.sv
similarity index 100%
rename from rtl_src/ITTAGE/array_0_0.sv
rename to rtl/ITTAGE/array_0_0.sv
diff --git a/rtl_src/ITTAGE/array_8.sv b/rtl/ITTAGE/array_8.sv
similarity index 100%
rename from rtl_src/ITTAGE/array_8.sv
rename to rtl/ITTAGE/array_8.sv
diff --git a/rtl_src/ITTAGE/data_16x16.sv b/rtl/ITTAGE/data_16x16.sv
similarity index 100%
rename from rtl_src/ITTAGE/data_16x16.sv
rename to rtl/ITTAGE/data_16x16.sv
diff --git a/rtl_src/ITTAGE/data_32x16.sv b/rtl/ITTAGE/data_32x16.sv
similarity index 100%
rename from rtl_src/ITTAGE/data_32x16.sv
rename to rtl/ITTAGE/data_32x16.sv
diff --git a/rtl_src/ITTAGE/data_mem_0_4x2.sv b/rtl/ITTAGE/data_mem_0_4x2.sv
similarity index 100%
rename from rtl_src/ITTAGE/data_mem_0_4x2.sv
rename to rtl/ITTAGE/data_mem_0_4x2.sv
diff --git a/rtl/RAS.txt b/rtl/RAS.txt
new file mode 100644
index 0000000..e738a76
--- /dev/null
+++ b/rtl/RAS.txt
@@ -0,0 +1,3 @@
+./rtl/RAS/RASStack.sv
+./rtl/common/ext_sram.v
+./rtl/common/DelayN_2.sv
diff --git a/rtl_src/RAS/RAS.sv b/rtl/RAS/RAS.sv
similarity index 100%
rename from rtl_src/RAS/RAS.sv
rename to rtl/RAS/RAS.sv
diff --git a/rtl_src/RAS/RASStack.sv b/rtl/RAS/RASStack.sv
similarity index 100%
rename from rtl_src/RAS/RASStack.sv
rename to rtl/RAS/RASStack.sv
diff --git a/rtl_src/TageSC/CAMTemplate.sv b/rtl/TageSC/CAMTemplate.sv
similarity index 100%
rename from rtl_src/TageSC/CAMTemplate.sv
rename to rtl/TageSC/CAMTemplate.sv
diff --git a/rtl_src/TageSC/CAMTemplate_32.sv b/rtl/TageSC/CAMTemplate_32.sv
similarity index 100%
rename from rtl_src/TageSC/CAMTemplate_32.sv
rename to rtl/TageSC/CAMTemplate_32.sv
diff --git a/rtl_src/TageSC/CAMTemplate_33.sv b/rtl/TageSC/CAMTemplate_33.sv
similarity index 100%
rename from rtl_src/TageSC/CAMTemplate_33.sv
rename to rtl/TageSC/CAMTemplate_33.sv
diff --git a/rtl_src/TageSC/FoldedSRAMTemplate.sv b/rtl/TageSC/FoldedSRAMTemplate.sv
similarity index 100%
rename from rtl_src/TageSC/FoldedSRAMTemplate.sv
rename to rtl/TageSC/FoldedSRAMTemplate.sv
diff --git a/rtl_src/TageSC/FoldedSRAMTemplate_1.sv b/rtl/TageSC/FoldedSRAMTemplate_1.sv
similarity index 100%
rename from rtl_src/TageSC/FoldedSRAMTemplate_1.sv
rename to rtl/TageSC/FoldedSRAMTemplate_1.sv
diff --git a/rtl_src/TageSC/FoldedSRAMTemplate_20.sv b/rtl/TageSC/FoldedSRAMTemplate_20.sv
similarity index 100%
rename from rtl_src/TageSC/FoldedSRAMTemplate_20.sv
rename to rtl/TageSC/FoldedSRAMTemplate_20.sv
diff --git a/rtl_src/TageSC/SCTable.sv b/rtl/TageSC/SCTable.sv
similarity index 100%
rename from rtl_src/TageSC/SCTable.sv
rename to rtl/TageSC/SCTable.sv
diff --git a/rtl_src/TageSC/SCTable_1.sv b/rtl/TageSC/SCTable_1.sv
similarity index 100%
rename from rtl_src/TageSC/SCTable_1.sv
rename to rtl/TageSC/SCTable_1.sv
diff --git a/rtl_src/TageSC/SCTable_2.sv b/rtl/TageSC/SCTable_2.sv
similarity index 100%
rename from rtl_src/TageSC/SCTable_2.sv
rename to rtl/TageSC/SCTable_2.sv
diff --git a/rtl_src/TageSC/SCTable_3.sv b/rtl/TageSC/SCTable_3.sv
similarity index 100%
rename from rtl_src/TageSC/SCTable_3.sv
rename to rtl/TageSC/SCTable_3.sv
diff --git a/rtl_src/TageSC/SRAMTemplate_10.sv b/rtl/TageSC/SRAMTemplate_10.sv
similarity index 100%
rename from rtl_src/TageSC/SRAMTemplate_10.sv
rename to rtl/TageSC/SRAMTemplate_10.sv
diff --git a/rtl_src/TageSC/SRAMTemplate_11.sv b/rtl/TageSC/SRAMTemplate_11.sv
similarity index 100%
rename from rtl_src/TageSC/SRAMTemplate_11.sv
rename to rtl/TageSC/SRAMTemplate_11.sv
diff --git a/rtl_src/TageSC/SRAMTemplate_30.sv b/rtl/TageSC/SRAMTemplate_30.sv
similarity index 100%
rename from rtl_src/TageSC/SRAMTemplate_30.sv
rename to rtl/TageSC/SRAMTemplate_30.sv
diff --git a/rtl_src/TageSC/SRAMTemplate_31.sv b/rtl/TageSC/SRAMTemplate_31.sv
similarity index 100%
rename from rtl_src/TageSC/SRAMTemplate_31.sv
rename to rtl/TageSC/SRAMTemplate_31.sv
diff --git a/rtl_src/TageSC/TageBTable.sv b/rtl/TageSC/TageBTable.sv
similarity index 100%
rename from rtl_src/TageSC/TageBTable.sv
rename to rtl/TageSC/TageBTable.sv
diff --git a/rtl_src/TageSC/TageTable.sv b/rtl/TageSC/TageTable.sv
similarity index 100%
rename from rtl_src/TageSC/TageTable.sv
rename to rtl/TageSC/TageTable.sv
diff --git a/rtl_src/TageSC/TageTable_1.sv b/rtl/TageSC/TageTable_1.sv
similarity index 100%
rename from rtl_src/TageSC/TageTable_1.sv
rename to rtl/TageSC/TageTable_1.sv
diff --git a/rtl_src/TageSC/TageTable_2.sv b/rtl/TageSC/TageTable_2.sv
similarity index 100%
rename from rtl_src/TageSC/TageTable_2.sv
rename to rtl/TageSC/TageTable_2.sv
diff --git a/rtl_src/TageSC/TageTable_3.sv b/rtl/TageSC/TageTable_3.sv
similarity index 100%
rename from rtl_src/TageSC/TageTable_3.sv
rename to rtl/TageSC/TageTable_3.sv
diff --git a/rtl_src/TageSC/Tage_SC.sv b/rtl/TageSC/Tage_SC.sv
similarity index 100%
rename from rtl_src/TageSC/Tage_SC.sv
rename to rtl/TageSC/Tage_SC.sv
diff --git a/rtl_src/TageSC/array_4.sv b/rtl/TageSC/array_4.sv
similarity index 100%
rename from rtl_src/TageSC/array_4.sv
rename to rtl/TageSC/array_4.sv
diff --git a/rtl_src/TageSC/array_5.sv b/rtl/TageSC/array_5.sv
similarity index 100%
rename from rtl_src/TageSC/array_5.sv
rename to rtl/TageSC/array_5.sv
diff --git a/rtl_src/TageSC/array_6.sv b/rtl/TageSC/array_6.sv
similarity index 100%
rename from rtl_src/TageSC/array_6.sv
rename to rtl/TageSC/array_6.sv
diff --git a/rtl_src/TageSC/array_7.sv b/rtl/TageSC/array_7.sv
similarity index 100%
rename from rtl_src/TageSC/array_7.sv
rename to rtl/TageSC/array_7.sv
diff --git a/rtl_src/TageSC/data_mem_0_8x3.sv b/rtl/TageSC/data_mem_0_8x3.sv
similarity index 100%
rename from rtl_src/TageSC/data_mem_0_8x3.sv
rename to rtl/TageSC/data_mem_0_8x3.sv
diff --git a/rtl_src/TageSC/data_mem_16x12.sv b/rtl/TageSC/data_mem_16x12.sv
similarity index 100%
rename from rtl_src/TageSC/data_mem_16x12.sv
rename to rtl/TageSC/data_mem_16x12.sv
diff --git a/rtl_src/TageSC/data_mem_8x4.sv b/rtl/TageSC/data_mem_8x4.sv
similarity index 100%
rename from rtl_src/TageSC/data_mem_8x4.sv
rename to rtl/TageSC/data_mem_8x4.sv
diff --git a/rtl/Tage_SC.txt b/rtl/Tage_SC.txt
new file mode 100644
index 0000000..875b44a
--- /dev/null
+++ b/rtl/Tage_SC.txt
@@ -0,0 +1,27 @@
+./rtl/ITTAGE/CAMTemplate_41.sv
+./rtl/ITTAGE/CAMTemplate_43.sv
+./rtl/ITTAGE/Folded1WDataModuleTemplate.sv
+./rtl/ITTAGE/Folded1WDataModuleTemplate_2.sv
+./rtl/ITTAGE/FoldedSRAMTemplate_21.sv
+./rtl/ITTAGE/FoldedSRAMTemplate_25.sv
+./rtl/ITTAGE/ITTage.sv
+./rtl/ITTAGE/ITTageTable.sv
+./rtl/ITTAGE/ITTageTable_1.sv
+./rtl/ITTAGE/ITTageTable_2.sv
+./rtl/ITTAGE/ITTageTable_3.sv
+./rtl/ITTAGE/ITTageTable_4.sv
+./rtl/ITTAGE/SRAMTemplate_35.sv
+./rtl/ITTAGE/SRAMTemplate_39.sv
+./rtl/ITTAGE/WrBypass_41.sv
+./rtl/ITTAGE/WrBypass_43.sv
+./rtl/ITTAGE/array_0_0.sv
+./rtl/ITTAGE/array_8.sv
+./rtl/ITTAGE/data_16x16.sv
+./rtl/ITTAGE/data_32x16.sv
+./rtl/ITTAGE/data_mem_0_4x2.sv
+#
+./rtl/WrBypass/WrBypass.sv
+./rtl/WrBypass/WrBypass_32.sv
+./rtl/WrBypass/WrBypass_33.sv
+./rtl/common/ext_sram.v
+./rtl/common/DelayN_2.sv
diff --git a/rtl_src/WrBypass/WrBypass.sv b/rtl/WrBypass/WrBypass.sv
similarity index 100%
rename from rtl_src/WrBypass/WrBypass.sv
rename to rtl/WrBypass/WrBypass.sv
diff --git a/rtl_src/WrBypass/WrBypass_32.sv b/rtl/WrBypass/WrBypass_32.sv
similarity index 100%
rename from rtl_src/WrBypass/WrBypass_32.sv
rename to rtl/WrBypass/WrBypass_32.sv
diff --git a/rtl_src/WrBypass/WrBypass_33.sv b/rtl/WrBypass/WrBypass_33.sv
similarity index 100%
rename from rtl_src/WrBypass/WrBypass_33.sv
rename to rtl/WrBypass/WrBypass_33.sv
diff --git a/rtl_src/WrBypass/WrBypass_41.sv b/rtl/WrBypass/WrBypass_41.sv
similarity index 100%
rename from rtl_src/WrBypass/WrBypass_41.sv
rename to rtl/WrBypass/WrBypass_41.sv
diff --git a/rtl_src/WrBypass/WrBypass_43.sv b/rtl/WrBypass/WrBypass_43.sv
similarity index 100%
rename from rtl_src/WrBypass/WrBypass_43.sv
rename to rtl/WrBypass/WrBypass_43.sv
diff --git a/rtl_src/common/Composer.sv b/rtl/common/Composer.sv
similarity index 100%
rename from rtl_src/common/Composer.sv
rename to rtl/common/Composer.sv
diff --git a/rtl_src/common/DelayN_2.sv b/rtl/common/DelayN_2.sv
similarity index 100%
rename from rtl_src/common/DelayN_2.sv
rename to rtl/common/DelayN_2.sv
diff --git a/rtl_src/common/DelayN_4.sv b/rtl/common/DelayN_4.sv
similarity index 100%
rename from rtl_src/common/DelayN_4.sv
rename to rtl/common/DelayN_4.sv
diff --git a/rtl_src/common/DelayN_5.sv b/rtl/common/DelayN_5.sv
similarity index 100%
rename from rtl_src/common/DelayN_5.sv
rename to rtl/common/DelayN_5.sv
diff --git a/rtl_src/common/DelayN_6.sv b/rtl/common/DelayN_6.sv
similarity index 100%
rename from rtl_src/common/DelayN_6.sv
rename to rtl/common/DelayN_6.sv
diff --git a/rtl_src/common/Predictor.sv b/rtl/common/Predictor.sv
similarity index 100%
rename from rtl_src/common/Predictor.sv
rename to rtl/common/Predictor.sv
diff --git a/rtl_src/common/ext_sram.v b/rtl/common/ext_sram.v
similarity index 100%
rename from rtl_src/common/ext_sram.v
rename to rtl/common/ext_sram.v
diff --git a/rtl/uFTB.txt b/rtl/uFTB.txt
new file mode 100644
index 0000000..3de1a22
--- /dev/null
+++ b/rtl/uFTB.txt
@@ -0,0 +1,3 @@
+./rtl/uFTB/FauFTBWay.sv
+./rtl/common/ext_sram.v
+./rtl/common/DelayN_2.sv
diff --git a/rtl_src/uFTB/FauFTB.sv b/rtl/uFTB/FauFTB.sv
similarity index 100%
rename from rtl_src/uFTB/FauFTB.sv
rename to rtl/uFTB/FauFTB.sv
diff --git a/rtl_src/uFTB/FauFTBWay.sv b/rtl/uFTB/FauFTBWay.sv
similarity index 100%
rename from rtl_src/uFTB/FauFTBWay.sv
rename to rtl/uFTB/FauFTBWay.sv
diff --git a/rtl_src/FTB.txt b/rtl_src/FTB.txt
deleted file mode 100644
index 8573759..0000000
--- a/rtl_src/FTB.txt
+++ /dev/null
@@ -1,9 +0,0 @@
-./src/FTB/FTBBank.sv
-./src/FTB/FTBEntryGen.sv
-./src/FTB/SRAMTemplate_9.sv
-./src/FTB/array_3.sv
-./src/common/ext_sram.v
-./src/common/DelayN_2.sv
-./src/common/DelayN_4.sv
-./src/common/DelayN_5.sv
-./src/common/DelayN_6.sv
\ No newline at end of file
diff --git a/rtl_src/ITTAGE.txt b/rtl_src/ITTAGE.txt
deleted file mode 100644
index 82a2c5d..0000000
--- a/rtl_src/ITTAGE.txt
+++ /dev/null
@@ -1,24 +0,0 @@
-./src/ITTAGE/CAMTemplate_41.sv
-./src/ITTAGE/CAMTemplate_43.sv
-./src/ITTAGE/Folded1WDataModuleTemplate.sv
-./src/ITTAGE/Folded1WDataModuleTemplate_2.sv
-./src/ITTAGE/FoldedSRAMTemplate_21.sv
-./src/ITTAGE/FoldedSRAMTemplate_25.sv
-./src/ITTAGE/ITTage.sv
-./src/ITTAGE/ITTageTable.sv
-./src/ITTAGE/ITTageTable_1.sv
-./src/ITTAGE/ITTageTable_2.sv
-./src/ITTAGE/ITTageTable_3.sv
-./src/ITTAGE/ITTageTable_4.sv
-./src/ITTAGE/SRAMTemplate_35.sv
-./src/ITTAGE/SRAMTemplate_39.sv
-./src/ITTAGE/WrBypass_41.sv
-./src/ITTAGE/WrBypass_43.sv
-./src/ITTAGE/array_0_0.sv
-./src/ITTAGE/array_8.sv
-./src/ITTAGE/data_16x16.sv
-./src/ITTAGE/data_32x16.sv
-./src/ITTAGE/data_mem_0_4x2.sv
-#
-./src/common/ext_sram.v
-./src/common/DelayN_2.sv
\ No newline at end of file
diff --git a/rtl_src/RAS.txt b/rtl_src/RAS.txt
deleted file mode 100644
index a162349..0000000
--- a/rtl_src/RAS.txt
+++ /dev/null
@@ -1,3 +0,0 @@
-./src/RAS/RASStack.sv
-./src/common/ext_sram.v
-./src/common/DelayN_2.sv
\ No newline at end of file
diff --git a/rtl_src/Tage_SC.txt b/rtl_src/Tage_SC.txt
deleted file mode 100644
index c810e5d..0000000
--- a/rtl_src/Tage_SC.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-./src/ITTAGE/CAMTemplate_41.sv
-./src/ITTAGE/CAMTemplate_43.sv
-./src/ITTAGE/Folded1WDataModuleTemplate.sv
-./src/ITTAGE/Folded1WDataModuleTemplate_2.sv
-./src/ITTAGE/FoldedSRAMTemplate_21.sv
-./src/ITTAGE/FoldedSRAMTemplate_25.sv
-./src/ITTAGE/ITTage.sv
-./src/ITTAGE/ITTageTable.sv
-./src/ITTAGE/ITTageTable_1.sv
-./src/ITTAGE/ITTageTable_2.sv
-./src/ITTAGE/ITTageTable_3.sv
-./src/ITTAGE/ITTageTable_4.sv
-./src/ITTAGE/SRAMTemplate_35.sv
-./src/ITTAGE/SRAMTemplate_39.sv
-./src/ITTAGE/WrBypass_41.sv
-./src/ITTAGE/WrBypass_43.sv
-./src/ITTAGE/array_0_0.sv
-./src/ITTAGE/array_8.sv
-./src/ITTAGE/data_16x16.sv
-./src/ITTAGE/data_32x16.sv
-./src/ITTAGE/data_mem_0_4x2.sv
-#
-./src/WrBypass/WrBypass.sv
-./src/WrBypass/WrBypass_32.sv
-./src/WrBypass/WrBypass_33.sv
-./src/common/ext_sram.v
-./src/common/DelayN_2.sv
\ No newline at end of file
diff --git a/rtl_src/uFTB.txt b/rtl_src/uFTB.txt
deleted file mode 100644
index c249f0e..0000000
--- a/rtl_src/uFTB.txt
+++ /dev/null
@@ -1,3 +0,0 @@
-./src/uFTB/FauFTBWay.sv
-./src/common/ext_sram.v
-./src/common/DelayN_2.sv
\ No newline at end of file
diff --git a/test_src/uFTB-with-ftq/README.assets/env.png b/tests/uFTB-with-ftq/README.assets/env.png
similarity index 100%
rename from test_src/uFTB-with-ftq/README.assets/env.png
rename to tests/uFTB-with-ftq/README.assets/env.png
diff --git a/test_src/uFTB-with-ftq/README.md b/tests/uFTB-with-ftq/README.md
similarity index 100%
rename from test_src/uFTB-with-ftq/README.md
rename to tests/uFTB-with-ftq/README.md
diff --git a/test_src/uFTB-with-ftq/uftb-env/bpu_top.py b/tests/uFTB-with-ftq/uftb-env/bpu_top.py
similarity index 100%
rename from test_src/uFTB-with-ftq/uftb-env/bpu_top.py
rename to tests/uFTB-with-ftq/uftb-env/bpu_top.py
diff --git a/test_src/uFTB-with-ftq/uftb-env/bundle.py b/tests/uFTB-with-ftq/uftb-env/bundle.py
similarity index 100%
rename from test_src/uFTB-with-ftq/uftb-env/bundle.py
rename to tests/uFTB-with-ftq/uftb-env/bundle.py
diff --git a/test_src/uFTB-with-ftq/uftb-env/config.py b/tests/uFTB-with-ftq/uftb-env/config.py
similarity index 100%
rename from test_src/uFTB-with-ftq/uftb-env/config.py
rename to tests/uFTB-with-ftq/uftb-env/config.py
diff --git a/test_src/uFTB-with-ftq/uftb-env/executor.py b/tests/uFTB-with-ftq/uftb-env/executor.py
similarity index 100%
rename from test_src/uFTB-with-ftq/uftb-env/executor.py
rename to tests/uFTB-with-ftq/uftb-env/executor.py
diff --git a/test_src/uFTB-with-ftq/uftb-env/ftb.py b/tests/uFTB-with-ftq/uftb-env/ftb.py
similarity index 100%
rename from test_src/uFTB-with-ftq/uftb-env/ftb.py
rename to tests/uFTB-with-ftq/uftb-env/ftb.py
diff --git a/test_src/uFTB-with-ftq/uftb-env/ftq.py b/tests/uFTB-with-ftq/uftb-env/ftq.py
similarity index 100%
rename from test_src/uFTB-with-ftq/uftb-env/ftq.py
rename to tests/uFTB-with-ftq/uftb-env/ftq.py
diff --git a/test_src/uFTB-with-ftq/uftb-env/tb.py b/tests/uFTB-with-ftq/uftb-env/tb.py
similarity index 100%
rename from test_src/uFTB-with-ftq/uftb-env/tb.py
rename to tests/uFTB-with-ftq/uftb-env/tb.py
diff --git a/test_src/uFTB-with-ftq/uftb-env/uftb_model.py b/tests/uFTB-with-ftq/uftb-env/uftb_model.py
similarity index 100%
rename from test_src/uFTB-with-ftq/uftb-env/uftb_model.py
rename to tests/uFTB-with-ftq/uftb-env/uftb_model.py
diff --git a/test_src/uFTB-with-ftq/uftb-env/utils.py b/tests/uFTB-with-ftq/uftb-env/utils.py
similarity index 100%
rename from test_src/uFTB-with-ftq/uftb-env/utils.py
rename to tests/uFTB-with-ftq/uftb-env/utils.py
diff --git a/test_src/uFTB_raw/FTBEntry.py b/tests/uFTB_raw/FTBEntry.py
similarity index 100%
rename from test_src/uFTB_raw/FTBEntry.py
rename to tests/uFTB_raw/FTBEntry.py
diff --git a/test_src/uFTB_raw/FauFTB.py b/tests/uFTB_raw/FauFTB.py
similarity index 100%
rename from test_src/uFTB_raw/FauFTB.py
rename to tests/uFTB_raw/FauFTB.py
diff --git a/test_src/uFTB_raw/main.py b/tests/uFTB_raw/main.py
similarity index 100%
rename from test_src/uFTB_raw/main.py
rename to tests/uFTB_raw/main.py