diff --git a/Readme.md b/Readme.md
index 1d7fd11..bc81d7a 100644
--- a/Readme.md
+++ b/Readme.md
@@ -1,6 +1,6 @@
 # The first phase of Open Verification for the Kunminghu microarchitecture of Xiangshan: Kunminghu's BPU Module UT Verification in Action.
 
-[中文文档](Readme_cn.md)
+[中文文档](/Readme_cn.md)
 
 This project aims to explore open-sourced subdivision verification of the high-performance open-source RISC-V OpenXiangshan processor's microarchitecture. It introduces new tools and methods based on Python, enabling all students interested in chip design and verification to quickly grasp and study the XiangShan microarchitecture. This phase provides a detailed introduction to the principles and implementation of the branch prediction module of the XiangShan Kunminghu architecture, along with the corresponding open-source verification environment. Participants in this phase can earn points and rewards by submitting bugs, writing verification reports, and more.
 
@@ -15,7 +15,7 @@ This project utilizes open-source tools for the open verification of open-source
 
 ## Kunminghu microarchitecture
 
-The Kunming Lake architecture is the third-generation high-performance microarchitecture of the XiangShan open-source processor. For the architecture diagram, please refer to the [Kunminghu architecture diagram]().
+The Kunming Lake architecture is the third-generation high-performance microarchitecture of the XiangShan open-source processor. For the architecture diagram, please refer to the [Kunminghu architecture diagram](https://github.com/OpenXiangShan/XiangShan/raw/kunminghu/images/xs-arch-nanhu.svg).
 
 ## Chip verification
 
@@ -27,9 +27,9 @@ Chip validation is a crucial aspect of chip design work. Skipping or insufficien
 
 1. [Introduction to Shanhai BPU](https://open-verify.cc/xs-bpu/docs/): Learn about branch prediction and the basic predictors used in the Shanhai processor.
 
-1. [How to Participate in This Activity](doc/join_cn.md): Learn how to participate in this activity and the rules.
+1. [How to Participate in This Activity](/doc/join_cn.md): Learn how to participate in this activity and the rules.
 
-1. [Building Verification Environment](doc/env_cn.md): Learn how to set up the basic verification environment, how to validate, and submit validation results.
+1. [Building Verification Environment](/doc/env_cn.md): Learn how to set up the basic verification environment, how to validate, and submit validation results.
 
 ## Repository Directory
 The structure of this repository directory and corresponding explanations are as follows:
diff --git a/Readme_cn.md b/Readme_cn.md
index b0102e2..ad7cdca 100644
--- a/Readme_cn.md
+++ b/Readme_cn.md
@@ -1,6 +1,6 @@
 # 香山微架构开放验证第一期：昆明湖BPU模块UT验证实战
 
-**[English Document](Readme.md)**
+**[English Document](/Readme.md)**
 
 
 本项目的目标是对高性能开源RISC-V香山处理器的微架构进行开放式分包验证的探索。它提供了基于Python的新工具、新方法，让所有对芯片设计与验证感兴趣的同学能够快速了解香山微架构，学习香山微架构。本期活动对香山昆明湖架构的分支预测模块的原理以及实现进行了详细介绍，并提供了对应的开源验证环境。参本次活动的同学，通过提交Bug、编写验证报告等获取积分与奖励。
@@ -17,7 +17,7 @@
 
 ### 昆明湖微架构
 
-昆明湖架构是香山开源处理器的第三代高性能微架构，架构图请参考：[昆明湖架构图]()。
+昆明湖架构是香山开源处理器的第三代高性能微架构，架构图请参考：[昆明湖架构图](https://github.com/OpenXiangShan/XiangShan/raw/kunminghu/images/xs-arch-nanhu.svg)。
 
 ### 芯片验证
 
@@ -27,8 +27,8 @@
 
 1. **[基础学习材料](https://open-verify.cc/mlvp/docs/)**，学习什么是芯片验证，如何使用Python进行验证。
 1. **[香山BPU介绍](https://open-verify.cc/xs-bpu/docs/)**，学习什么是分支预测，香山处理器中采用了哪些基础预测器。
-1. **[如何参与本活动](doc/join_cn.md)**，介绍如何参与本活动，有哪些活动规则。
-1. **[构建验证环境](doc/env_cn.md)**，介绍基本验证环境搭建，如何进行验证和提交验证结果。
+1. **[如何参与本活动](/doc/join_cn.md)**，介绍如何参与本活动，有哪些活动规则。
+1. **[构建验证环境](/doc/env_cn.md)**，介绍基本验证环境搭建，如何进行验证和提交验证结果。
 
 
 ## 本仓库目录