Operator: Sigmoid-Affine-Gate (Fused CUDA Kernel)

Goal
- Fuse affine, sigmoid activation, sigmoid gate, and multiply to reduce memory traffic and launches; target ≥1.30x speedup.

Inputs/Outputs
- Input `x`: [B, D], float32
- Parameters `scale`, `bias`: [D], float32
- Scalars `alpha`, `beta`: float32
- Output `y`: [B, D], float32

Definition
- z = x * scale + bias
- m = sigmoid(z)
- g = sigmoid(alpha * m + beta)
- y = x * g

CUDA Design
- 2D grid; block=256; ILP=2; float4 vectorization
- Fast sigmoid via `__expf`, FMA for affine
- Scalars passed by value to avoid device-host sync
